SLOS318L april   2000  – august 2023 THS4130 , THS4131

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Common-Mode Voltage
        1. 9.1.1.1 Resistor Matching
      2. 9.1.2 Driving a Capacitive Load
      3. 9.1.3 Data Converters
      4. 9.1.4 Single-Supply Applications
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20211213-SS0I-BWPT-MX2W-RXH19LBGCN6D-low.svgFigure 6-1 D Package, 8-Pin SOIC,
DGK Package, 8-pin VSSOP,
DGN Package, 8-Pin HVSSOP
THS4130 (Top View)
GUID-20211213-SS0I-GLPZ-WR5Q-DGD6GRGRDSXV-low.svgFigure 6-2 D Package, 8-Pin SOIC,
DGK Package, 8-pin VSSOP,
DGN Package, 8-Pin HVSSOP
THS4131 (Top View)
Table 6-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
THS4130 THS4131
NC — 7 — No connect
PD 7 — I Active low power-down pin
VCC+ 3 3 I/O Positive supply voltage pin
VCC– 6 6 I/O Negative supply voltage pin
VIN– 1 1 I Negative input pin
VOCM 2 2 I Common mode input pin
VOUT+ 4 4 O Positive output pin
VOUT– 5 5 O Negative output pin
VIN+ 8 8 I Positive input pin
Thermal Pad Thermal Pad Thermal Pad __ Thermal pad. DGN (HVSSOP) package only. For the best thermal performance, connect the thermal pad to a large copper plane. This pad is electrically isolated from the die so the pad can be connected to any pin on the package.
(1) I = input, O = output.