SLOS930C November   2015  – October 2024 THS4541-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: (Vs+) – Vs– = 5 V
    6. 6.6 Electrical Characteristics: (Vs+) – Vs– = 3 V
    7. 6.7 Typical Characteristics: 5-V Single Supply
    8. 6.8 Typical Characteristics: 3-V Single Supply
    9. 6.9 Typical Characteristics: 3-V to 5-V Supply Range
  8. 7 Parameter Measurement Information
    1. 7.1 Example Characterization Circuits
    2. 7.2 Frequency-Response Shape Factors
    3. 7.3 I/O Headroom Considerations
    4. 7.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    5. 7.5 Noise Analysis
    6. 7.6 Factors Influencing Harmonic Distortion
    7. 7.7 Driving Capacitive Loads
    8. 7.8 Thermal Analysis
  9. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Terminology and Application Assumptions
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Differential I/O
      2. 8.3.2 Power-Down Control Pin ( PD)
        1. 8.3.2.1 Operating the Power Shutdown Feature
      3. 8.3.3 Input Overdrive Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 8.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 8.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 8.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
        4. 8.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
      2. 8.4.2 Differential-Input to Differential-Output Operation
        1. 8.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 8.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Designing Attenuators
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Interfacing to High-Performance ADCs
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 TINA Simulation Model Features
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.1 Terminology and Application Assumptions

Like all widely-used devices, numerous common terms have developed that are unique to this type of device. These terms include:

  • Fully differential amplifier (FDA)—In this document, this term is restricted to devices offering what appears similar to a differential inverting op amp design element that requires an input resistor (not high-impedance input) and includes a second internal control-loop setting the output average voltage (Vocm) to a default or set point. This second loop interacts with the differential loop in some configurations.
  • The desired output signal at the two output pins is a differential signal swinging symmetrically around a common-mode voltage where that is the average voltage for the two outputs.
  • Single-ended to differential—always use the outputs differentially in an FDA; however, the source signal can be either a single-ended source or differential, with a variety of implementation details for either. When the FDA operation is single-ended to differential, only one of the two input resistors receives the source signal with the other input resistor connected to a dc reference (often ground) or through a capacitor to ground.

To simplify, several features in the application of the THS4541-Q1 are not explicitly stated, but are necessary for correct operation. These requirements include:

  • Good power-supply decoupling is required. Minimize the distance (< 0.1") from the power-supply pins to high-frequency, 0.1-μF decoupling capacitors. Often a larger capacitor (2.2 µF is typical) is used along with a high-frequency, 0.1-µF supply decoupling capacitor at the device supply pins (share this capacitor for the four supply pins in the package). For single-supply operation, only the positive supply has these capacitors. When a split supply is used, use these capacitors for each supply to ground. If necessary, place the larger capacitors somewhat farther from the device and share these capacitors among several devices in the same area of the printed circuit board (PCB). For each THS4541-Q1, attach a separate 0.1-µF capacitor to a nearby ground plane. With cascaded or multiple parallel channels, including ferrite beads from the larger capacitor is often useful to the local high-frequency decoupling capacitor.
  • Minimize the distance (< 0.1") from the power-supply pins to high-frequency, 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout must not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Always decouple the power-supply connections (on pins 4 and 7) with these capacitors. An optional supply decoupling capacitor across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. Use larger (2.2 μF to 6.8 μF) decoupling capacitors, effective at lower frequency, on the main supply pins. Place these capacitors somewhat farther from the device. These capacitors can be shared among several devices in the same area of the PCB.
  • Although not always stated, tie the power disable pin to the positive supply when only an enabled channel is desired.
  • Virtually all ac characterization equipment expects a 50-Ω termination from the 50-Ω source, and a 50-Ω single-ended source impedance from the device outputs to the 50-Ω sensing termination. This termination is achieved in all characterizations (often with some insertion loss), but is not necessary for most applications. Matching impedance is most often required when transmitting over longer distances. Tight layouts from a source, through the THS4541-Q1, and on to an ADC input do not require doubly-terminated lines or filter designs; the exception is if the source requires a defined termination impedance for correct operation (for example, a SAW filter source).
  • The amplifier signal path is flexible for single or split-supply operation. Most applications are intended to be single supply, but any split-supply design can be used, as long as the total supply across the TH4541-Q1 is less than 5.5 V and the required input, output, and common-mode pin headrooms to each supply are observed. Left open, the Vocm pin defaults to near midsupply for any combination of split or single supplies used. The disable pin is negative-rail referenced. Using a negative supply requires the disable pin to be pulled down to within 0.7 V of the negative supply to disable the amplifier.
  • External element values are normally assumed to be accurate and matched. In an FDA, match the feedback resistor values and also match the (dc and ac) impedance from the summing junctions to the source on one side and the reference or ground on the other side. Unbalancing these values introduces nonidealities in the signal path. For the signal path, imbalanced resistor ratios on the two sides create a common-mode to differential conversion. Also, mismatched Rf values and feedback ratios create some added differential output error terms from any common-mode dc, ac signal, or noise terms. Snapping to standard 1% resistor values is a typical approach and generally leads to some nominal feedback ratio mismatch. Mismatched resistors or ratios do not in themselves degrade harmonic distortion. If there is meaningful CM noise or distortion coming in, those errors are converted to a differential error through element or ratio mismatch.