Product details

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.4 BW at Acl (MHz) 620 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 1500 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 2.2 Iq per channel (typ) (mA) 10.1 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 0.45 Operating temperature range (°C) -40 to 125 Iout (typ) (mA) 100 2nd harmonic (dBc) 95 3rd harmonic (dBc) 90 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 850 Input bias current (max) (pA) 13000000 Features Decompensated, Shutdown CMRR (typ) (dB) 100 Rating Automotive
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.4 BW at Acl (MHz) 620 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 1500 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 2.2 Iq per channel (typ) (mA) 10.1 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 0.45 Operating temperature range (°C) -40 to 125 Iout (typ) (mA) 100 2nd harmonic (dBc) 95 3rd harmonic (dBc) 90 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 850 Input bias current (max) (pA) 13000000 Features Decompensated, Shutdown CMRR (typ) (dB) 100 Rating Automotive
VQFN (RGT) 16 9 mm² 3 x 3
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Bandwidth: 500 MHz (G = 2 V/V)
  • Gain bandwidth product: 850 MHz
  • Slew rate: 1500 V/µs
  • HD2: –95 dBc at 10 MHz (2 VPP, RL = 500 Ω)
  • HD3: –90 dBc at 10 MHz (2 VPP, RL = 500 Ω)
  • Input voltage noise: 2.2 nV/Hz (f > 100 kHz)
  • Low offset drift: ±0.5 µV/°C (typ)
  • Negative rail input (NRI)
  • Rail-to-rail output (RRO)
  • Power supply:
    • Single-supply voltage range: 2.7 V to 5.4 V
    • Split-supply voltage range: ±1.35 V to ±2.7 V
    • Quiescent current: 10.1 mA (5-V supply)
  • Power-down capability: 2 µA (typ)
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Bandwidth: 500 MHz (G = 2 V/V)
  • Gain bandwidth product: 850 MHz
  • Slew rate: 1500 V/µs
  • HD2: –95 dBc at 10 MHz (2 VPP, RL = 500 Ω)
  • HD3: –90 dBc at 10 MHz (2 VPP, RL = 500 Ω)
  • Input voltage noise: 2.2 nV/Hz (f > 100 kHz)
  • Low offset drift: ±0.5 µV/°C (typ)
  • Negative rail input (NRI)
  • Rail-to-rail output (RRO)
  • Power supply:
    • Single-supply voltage range: 2.7 V to 5.4 V
    • Split-supply voltage range: ±1.35 V to ±2.7 V
    • Quiescent current: 10.1 mA (5-V supply)
  • Power-down capability: 2 µA (typ)

The THS4541-Q1 is a low-power, voltage-feedback, fully differential amplifier (FDA) with an input common-mode range below the negative rail, and rail-to-rail output. Designed for low-power data acquisition systems where high density is critical in a high-performance analog-to-digital converter (ADC) or digital-to-analog converter (DAC) interface design.

The THS4541-Q1 features the negative-rail input required when interfacing a DC-coupled, ground-centered, source signal. This negative-rail input, with rail-to-rail output, allows for easy interface between single-ended, ground-referenced, bipolar signal sources and a wide variety of successive approximation register (SAR), delta-sigma (ΔΣ), or pipeline ADCs using only a single 2.7-V to 5.4-V power supply.

The THS4541-Q1 is characterized for operation over the wide temperature range of –40°C to +125°C and is available in a 16-pin VQFN package both with and without wettable flanks. The package with wettable flanks eases post-assembly visual inspection and is available as the THS4541W-Q1.

The THS4541-Q1 is a low-power, voltage-feedback, fully differential amplifier (FDA) with an input common-mode range below the negative rail, and rail-to-rail output. Designed for low-power data acquisition systems where high density is critical in a high-performance analog-to-digital converter (ADC) or digital-to-analog converter (DAC) interface design.

The THS4541-Q1 features the negative-rail input required when interfacing a DC-coupled, ground-centered, source signal. This negative-rail input, with rail-to-rail output, allows for easy interface between single-ended, ground-referenced, bipolar signal sources and a wide variety of successive approximation register (SAR), delta-sigma (ΔΣ), or pipeline ADCs using only a single 2.7-V to 5.4-V power supply.

The THS4541-Q1 is characterized for operation over the wide temperature range of –40°C to +125°C and is available in a 16-pin VQFN package both with and without wettable flanks. The package with wettable flanks eases post-assembly visual inspection and is available as the THS4541W-Q1.

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Technical documentation

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Type Title Date
* Data sheet THS4541-Q1 Negative Rail Input, Rail-to-Rail Output, Precision, 850-MHz Fully Differential Amplifier datasheet (Rev. B) PDF | HTML 15 Nov 2019
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Application note Design for a Wideband Differential Transimpedance DAC Output (Rev. A) 17 Oct 2016
Application note Design for a Wideband Differential Transimpedance DAC Output 18 Apr 2008
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

THS4541RGTEVM — THS4541 Evaluation Module in RGT Package

The THS4541RGT EVM is an evaluation module for the single THS4541 amplifier in the RGT package. This evaluation module is designed to quickly and easily demonstrate the functionality and versatility of the amplifier. The EVM is ready to connect to power, signal source, and test instruments (...)

User guide: PDF
Not available on TI.com
Evaluation board

DEV-ADC34J22 — DEV-ADC34J22 Evaluation Module

The DEV-ADC34J22 is a four-channel, 50MSPS ADC Module designed to integrate with Altera’s HSMC standard. The DEV-ADC34J22 features TI’s new JESD204B compliant ADC34J22 Analog Digital Converter (ADC), with clocking conditioning using TI’s LMK04828 jitter cleaner. It provides (...)

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Reference designs

TIDA-00294 — Dallas Logic Corp high performance active interface for high-speed ADCs reference design

This reference design, provided by Dallas Logic Corp, uses the ADC34J22 12b 50MSPS JESD204B data converter and the THS4541 fully differential amplifier to show how to design a high-performance active interface for high speed ADCs. This type of circuit can be used in sensor front end, motor control, (...)
Design guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
VQFN (RGT) 16 Ultra Librarian

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