SLLSFO2B December 2022 – March 2024 THVD2410V , THVD2412V , THVD2450V , THVD2452V
PRODUCTION DATA
The differential receivers of THVD24xxV feature fully symmetric thresholds to maintain duty cycle of the signal even with small input amplitudes. In addition, 250 mV (typical) hysteresis provides noise immunity. When the device is in slew rate limited mode of 250 kbps, typical 700 ns of glitch filter in receiver signal chain prevents high frequency noise pulses from the bus to appear on R pin.