SLLSFS1B August   2023  – April 2024 THVD4431

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_RS-485_500kbps
    9. 5.9  Switching Characteristics_RS-485_20Mbps
    10. 5.10 Switching Characteristics, Driver_RS232
    11. 5.11 Switching Characteristics, Receiver_RS232
    12. 5.12 Switching Characteristics_MODE switching
    13. 5.13 Switching Characteristics_RS-485_Termination resistor
    14. 5.14 Switching Characteristics_Loopback mode
    15. 5.15 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Integrated IEC ESD and EFT Protection
      2. 7.3.2 Protection Features
      3. 7.3.3 RS-485 Receiver Fail-Safe Operation
      4. 7.3.4 Low-Power Shutdown Mode
      5. 7.3.5 On-chip Switchable Termination Resistor
      6. 7.3.6 Operational Data Rate
      7. 7.3.7 Diagnostic Loopback
      8. 7.3.8 Integrated Charge pump for RS-232
    4. 7.4 Device Functional Modes
      1. 7.4.1 RS-485 Functionality
      2. 7.4.2 RS-232 Functionality
      3. 7.4.3 Mode Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length for RS-485
        2. 8.2.1.2 Stub Length for RS-485 Network
        3. 8.2.1.3 Bus Loading for RS-485 Network
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2 Typical Application

An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line reflections, each cable end is terminated with a termination resistor, RT, whose value matches the characteristic impedance, Z0, of the cable. This method, known as parallel termination, generally allows for higher data rates over longer cable length.

GUID-20230809-SS0I-06PC-4GGC-CQ5JFNCL9RJ7-low.svg Figure 8-1 Typical RS-485 Network With Half-Duplex Transceivers
GUID-20230809-SS0I-9SMM-WD4W-0WNL4C2CCBWS-low.svg Figure 8-2 Typical RS-485 Network With Full-Duplex Transceivers

THVD4431 can be used in both networks (half and full duplex) and at all nodes (end node or middle nodes) since device has the configurability based on MODE2, MODE1, MODE0 pins and TERM_TX, TERM_RX pins.

THVD4431 also consists of three line drivers, five line receivers and dual charge pump circuit to enable RS-232 point-to-point serial communication. Full duplex transmission with hardware flow control is feasible with this device. This device provides the electrical interface between an asynchronous communication controller and the serial-port connector.

GUID-20230809-SS0I-8FLX-60Z2-XX2QNVP4L9QN-low.svg Figure 8-3 RS-232 serial communication