SLLSFD6A May   2020  – March 2021 THVD8000

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Power Dissipation Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 OOK Modulation with F_SET pin
      2. 8.3.2 OOK Demodulation
      3. 8.3.3 Transmitter Timeout
      4. 8.3.4 Polarity Free Operation
      5. 8.3.5 Glitch Free Mode Change
      6. 8.3.6 Integrated IEC ESD and EFT Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 OOK Mode
      2. 8.4.2 Thermal shutdown (TSD)
  9. Application Information Disclaimer
    1. 9.1 Application information
    2. 9.2 Typical application (OOK mode)
      1. 9.2.1 Design requirements
        1. 9.2.1.1 Carrier frequency
      2. 9.2.2 Detailed design procedure
        1. 9.2.2.1 Inductor value selection
        2. 9.2.2.2 Capacitor value selection
      3. 9.2.3 Application Curves
  10. 10Power supply recommendations
  11. 11Layout
    1. 11.1 Layout guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Inductor value selection

It is important to note that the inductor selected must also take power consumption into consideration. The inductor should be sized to handle the maximum anticipated current in addition to the inductance value.

The parallel aggregate impedance should be selected so that the total equivalent impedance at the carrier frequency is Z ≥ 375 Ω. This assumes RS-485 loading with 60 Ω termination. If no termination is used in the application, then the total equivalent impedance at the carrier frequency could be reduced to Z ≥ 60 Ω. These examples assume that termination is used. Equation 1 shows the parallel aggregate impedance equation for inductors L1 to Ln. Since the inductance value for each node should be the same, it's simple to determine that each node's impedance should be n times the total equivalent impedance. For example, if there are 4 nodes connected to the bus and the equivalent impedance is 375 Ω, then each node impedance should be 1,500 Ω.

Equation 1. GUID-EF390402-77DD-4F04-AFD5-ED3EDEA2670D-low.gif

To determine the suggested inductance value, Equation 2 can be rearranged to determine Ln, as shown in Equation 3.

Equation 2. GUID-7D000A23-EBFA-4549-B2D7-9B4B696600DC-low.gif
Equation 3. GUID-64FAADCB-F9A8-4104-9DA6-B39A9932EC3C-low.gif

ƒ0 is the carrier frequency (OOK frequency) used. If the previous 1.5 kΩ impedance per node is assumed with a carrier frequency of 1 MHz, the resulting inductance limit is ~240 µH per node. Be aware that this is the minimum suggested value per node. Refer to Figure 9-2 as a quick reference on the minimum inductance value to achieve 375 Ω of total aggregate impedance. This value can be multiplied by the number of nodes on the bus to get the minimum inductance per node. Referring to the previous example, if there are 4 nodes and a carrier frequency of 1 MHz, then the minimum aggregate inductance is about 60 µH, which is 240 µH when multiplied by 4.