SLLSFJ1D February   2022  – March 2023 TIOL112 , TIOL1123 , TIOL1125

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Wake-Up Detection
      2. 8.3.2  Current Limit Configuration
      3. 8.3.3  Current Fault Detection, Indication and Auto Recovery
      4. 8.3.4  Thermal Warning, Thermal Shutdown
      5. 8.3.5  Fault Reporting (NFAULT)
      6. 8.3.6  Transceiver Function Tables
      7. 8.3.7  The Integrated Voltage Regulator (LDO)
      8. 8.3.8  Reverse Polarity Protection
      9. 8.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 8.3.10 Power Up Sequence (TIOL112)
      11. 8.3.11 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch SIO Mode)
      2. 8.4.2 PNP Configuration (P-Switch SIO Mode)
      3. 8.4.3 Push-Pull, Communication Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Junction Temperature Check
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Electrical Characteristics

Over recommended operating conditions and recommended free-air temperature range (unless otherwise noted). Typical values are at L+ = 24 V, VVCC_IN = 3.3 V, VVCC_OUT = 3.3 V and TA = 25 ℃ unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES (L+)
I(L+) Quiescent supply current EN = LOW, no load 1 1.5 mA
EN = HIGH, no load 2 2.95 mA
LOGIC-LEVEL INPUTS (EN, TX, VSEL)
VIL Input logic low voltage 0.8 V
VIH Input logic high voltage 2 V
RPD Pull-down (EN) resistance 100 kΩ
RPU Pull-up (TX) resistance 200 kΩ
RPU Pull-up (VSEL) resistance 1000 kΩ
CONTROL OUTPUTS (WAKE, NFAULT)
VOL Output logic low voltage IO = 4 mA 0.5 V
IOZ Output high impedance leakage Output in Hi-Z, VO = 0 V or VCC_IN/OUT –1 1 µA
DRIVER OUTPUT (CQ)
RDS(ON) High-side driver on-resistance 2.5 4.5 Ω
VDS(ON) High-side driver residual voltage I = 200 mA 0.5 0.9 V
I = 100 mA 0.25 0.5 V
RDS(ON) Low-side driver on-resistance 2.5 4.5 Ω
VDS(ON) Low-side driver residual voltage I = 200 mA 0.5 0.9 V
I = 100 mA 0.25 0.5 V
IOZ(CQ) CQ leakage EN = LOW, 0 ≤ V(CQ) ≤ (V(L+) - 0.1 V) –2 2 µA
ILLM CQ load discharge current EN = LOW, RSET = 0 to 5 kΩ (2), V(CQ) >= 5 V 5 15 mA
IO(LIM) Driver output current limit RSET = 110 kΩ; V(CQ)= (VL+ - 3) V or 3 V 35 50 70 mA
RSET = 10 kΩ 300 350 400 mA
RSET = 0 to 5 kΩ  (2) 
V(CQ)= (VL+ - 3) V or 3 V
TJ < T(SDN) or t < 200 µs (7)		 500 mA
(Fast-detect mode) RSET = OPEN(1)V(CQ)= (VL+ - 3) V or 3 V 260 330 400 mA
RECEIVER INPUT (CQ)
V(THH) Input threshold “H” V(L+) > 18 V, EN= LOW 10.5 13 V
V(THL) Input threshold “L" 8 11.5 V
V(HYS) Receiver Hysteresis
(V(THH) - V(THL))		 0.75 V
V(THH) Input threshold “H” V(L+) < 18 V, EN= LOW See Note (4) See Note (5) V
V(THL) Input threshold “L" V(L+) < 18 V, EN= LOW See Note (6) See Note (7) V
V(HYS) Receiver Hysteresis
(V(THH) - V(THL))		 0.75 V
VOL RX output low voltage IOL = 4 mA 0.4 V
VOH RX output high voltage IOL = –4 mA VCC_IN/
OUT–0.5		 V
PROTECTION CIRCUITS
V(UVLO) L+ under voltage lockout L+ falling; NFAULT = Hi-Z 6 6.3 V
L+ rising; NFAULT = LOW 6.5 6.8 V
V(UVLO,HYS) L+ under voltage hysteresis Rising to falling threshold 200 mV
V(UVLO_IN) VCC_IN under voltage lockout (No LDO option) VCC_IN falling; NFAULT = Hi-Z 2.3 V
VCC_IN rising; NFAULT = LOW 2.5 V
V(UVLO,HYS) VCC_IN under voltage hysteresis (No LDO option) Rising to falling threshold 190 mV
T(WRN) Thermal warning Die temperature TJ 125 °C
T(SDN) Thermal shutdown 150 160 °C
T(HYS) Thermal hysteresis for shutdown 14 °C
T(WRN) Thermal hysteresis for warning Die temperature TJ 14 °C
IREV Leakage current in reverse polarity EN=LOW, TX=x; V(CQ) < V(L-) or V(CQ) > V(L+), up to |36 V| 60 µA
EN=LOW, TX=x; V(CQ) < V(L-) or V(CQ) > V(L+), up to |65 V| 110 µA
EN = HIGH, TX = LOW; V(CQ to L+) = 3 V 640 µA
EN = HIGH, TX = HIGH; V(CQ to L-) = -3 V 10 µA
LINEAR REGULATOR (LDO)
V(VCC_OUT) Voltage regulator output TIOL1125, TIOL1123L (5V) 4.75 5 5.25 V
TIOL1123, TIOL1123L (3.3V) 3.13 3.3 3.46 V
V(DROP) Voltage regulator drop-out voltage
(V(L+) – V(VCC_OUT))		 ICC = 20 mA load current TIOL1125, TIOL1123L (5V) 0.75 1.9 V
TIOL1123, TIOL1123L (3.3V) 0.75 2.3 V
REG Line regulation (dV(VCC_OUT)/dV(L+)) I(VCC_OUT) = 1 mA 1.7 mV/V
LREG Load regulation (dV(VCC_OUT)/V(VCC_OUT)) V(L+) = 24 V, I(VCC_OUT) = 100 µA to 20 mA 1%
PSSR Power Supply Rejection Ratio 100 kHz, I(VCC_OUT) = 20 mA 40 dB
(1) Current fault indication will be active. Current fault auto recovery will be de-activated.
(2) Current fault indication and current fault auto recovery will be de-activated.
(3) If operating continuosly with this current limit, ensure that the current through the device does not cause the TJ to be greater than T(SDN) for a given ambient temperature and thermal porperty of the system. For pulse durations t < 200 µs, the device can source or sink current of at least 500 mA across the recommended operating conditions. For YAH (DSBGA) package, this parameter is specified by design and characterization.
(4) VTHH (min) = 5 V + (11/18) [V(L+) - 8 V]
(5) VTHH (max) = 6.5 V + (13/18) [V(L+) - 8 V]
(6) VTHL (min) = 4 V + (8/18) [V(L+) -8 V]
(7) VTHL (max) = 6 V + (11/18) [V(L+) -8 V]