SLLSFS6A September   2024  – December 2024 TIOL221

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Wake-Up Detection
      2. 7.3.2  Current Limit Configuration
        1. 7.3.2.1 Current Limit Configuration in Pin-Mode
        2. 7.3.2.2 Current Limit Configuration in SPI mode
      3. 7.3.3  CQ Current Fault Detection, Indication and Auto Recovery
      4. 7.3.4  DO Current Fault Detection, Indication and Auto Recovery
      5. 7.3.5  CQ and DI Receivers
      6. 7.3.6  Fault Reporting
        1. 7.3.6.1 Thermal Warning, Thermal Shutdown
      7. 7.3.7  The Integrated Voltage Regulator (LDO)
      8. 7.3.8  Reverse Polarity Protection
      9. 7.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 7.3.10 Undervoltage Lock-Out (UVLO)
      11. 7.3.11 Interrupt Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 CQ and DO Tracking mode
    5. 7.5 SPI Programming
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Driving Capacitive Loads
        2. 8.2.2.2 Driving Inductive Loads
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 TIOL221 Registers
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 CQ and DI Receivers

RX1 is the output of the CQ receiver. The receiver output is the inverse logic of the CQ input and the receiver function is summarized in Table 7-3. In pin-mode, the CQ receiver is always on. In SPI mode, in addition to the RX1 output, the CQ_RX_LEVEL bit in the STATUS register reflects the logic level of CQ bus input level. In SPI mode, the receiver can be disabled by setting the RX_DIS bit in the CQ_CONFIG register. When the receiver is disabled, RX1 output is in high-impedance and CQ_RX_LEVEL bit in the status register is invalid.

Table 7-3 CQ Receiver Function
SPI/PINCQ VOLTAGERX1 CQ_RX_LEVEL bitCOMMENT

L or

(H && RX_DIS =0)		V(CQ) < V(THL)HLNormal receive mode, input low
V(THL) < V(CQ) < V(THH)??Indeterminate output, can be either high or low
V(THH) < V(CQ)LHNormal receive mode, input high
Open??Indeterminate output, can be either high or low
H && RX_DIS =1XZZOutput is in high-Z

RX2 is the output of the DI receiver. The receiver output is the inverse logic of the DI input and the receiver function is summarized in Table 7-3. In pin-mode, the DI receiver is always on. In SPI mode, in addition to the RX2 output, the DI_LEVEL bit in the STATUS register reflects the logic level of DI input. In SPI mode, the receiver can be disabled by setting the DI_DIS bit in the DI_CONFIG register. When the receiver is disabled, RX2 output is in high-impedance and DI_LEVEL bit in the status register is invalid.

Table 7-4 DI Receiver Function

DI

VOLTAGE		RX2DI_LEVEL bitCOMMENT
V(DI) < V(THL)HLNormal receive mode, input low
V(THL) < V(DI) < V(THH)??Indeterminate output, can be either high or low
V(THH) < V(DI)LHNormal receive mode, input high
Open??Indeterminate output, can be either high or low