SLLSFS6A September   2024  – December 2024 TIOL221

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Wake-Up Detection
      2. 7.3.2  Current Limit Configuration
        1. 7.3.2.1 Current Limit Configuration in Pin-Mode
        2. 7.3.2.2 Current Limit Configuration in SPI mode
      3. 7.3.3  CQ Current Fault Detection, Indication and Auto Recovery
      4. 7.3.4  DO Current Fault Detection, Indication and Auto Recovery
      5. 7.3.5  CQ and DI Receivers
      6. 7.3.6  Fault Reporting
        1. 7.3.6.1 Thermal Warning, Thermal Shutdown
      7. 7.3.7  The Integrated Voltage Regulator (LDO)
      8. 7.3.8  Reverse Polarity Protection
      9. 7.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 7.3.10 Undervoltage Lock-Out (UVLO)
      11. 7.3.11 Interrupt Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 CQ and DO Tracking mode
    5. 7.5 SPI Programming
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Driving Capacitive Loads
        2. 8.2.2.2 Driving Inductive Loads
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 TIOL221 Registers
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Wake-Up Detection

The CQ channel of TIOL221 may be operated in IO-Link mode or Standard Input / Output (SIO) mode. If the CQ channel is in SIO mode, and the IO-link controller node wants to initiate communication with the device node, the controller drives the CQ line to the opposite of the present state. The device either sinks or sources the current (≥ 500mA) for the wake-up duration (typically 80μs) depending on the CQ logic level as per the IO-Link specification. The TIOL221 detects a wake-up condition and communicates to the local microcontroller by asserting the WU pin low for the duration of tWUL. The IO-Link communication specification requires the device node to switch to receive mode within 500μs after receiving the wake-up signal.

Table 7-1 Wake-Up Function (tWU1 < t < tWU2)
EN1TX1CQ CURRENTWAKECOMMENT
L / OpenXXAsserts low for tWULDevice asserts low for tWUL if RX output changes high-to-low or low-to-high for tWU1 < t < tWU2
HH / Open| I(CQ) | ≥ IO(LIM) mAAsserts low for tWULDevice receives high-level wake-up request over the IO-Link bus
HL| I(CQ) | ≥ IO(LIM) mAAsserts low for tWULDevice receives low-level wake-up request over the IO-Link bus

For overcurrent conditions shorter or longer than a valid wake-up pulse, the WAKE pin remains in a high- impedance (inactive) state. This is illustrated in Figure 6-6.

In the SPI-mode, in addition to the WU asserted low, WU_INT bit is set. Wake-up signaling can be disabled in the SPI-mode by setting the WU_DIS bit to 1b in the DEVICE_CONFIG register. Wake-up detection cannot be disabled in the pin-mode.

The DO channel of TIOL221 does not recognize wake-up pulses. The DO pin does provide overcurrent limiting and detection.