SLLSEV6C
July 2017 – February 2021
TIOS101
,
TIOS1013
,
TIOS1015
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Current Limit Configuration
8.3.2
Current Fault Detection, Indication and Auto Recovery
8.3.3
Thermal Warning, Thermal Shutdown
8.3.4
Fault Reporting (NFAULT)
8.3.5
Device Function Tables
8.3.6
The Integrated Voltage Regulator (LDO)
8.3.7
Reverse Polarity Protection
8.3.8
Integrated Surge Protection and Transient Waveform Tolerance
8.3.9
Power Up Sequence
8.3.10
Undervoltage Lock-Out (UVLO)
8.4
Device Functional Modes
8.4.1
NPN Configuration (N-Switch Mode)
8.4.2
PNP Configuration (P-Switch Mode)
8.4.3
Push-Pull Mode
9
Application Information Disclaimer
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Maximum Junction Temperature Check
9.2.2.2
Driving Capacitive Loads
9.2.2.3
Driving Inductive Loads
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
Package Options
Mechanical Data (Package|Pins)
DMW|10
MPSS089
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sllsev6c_oa
sllsev6c_pm
6.7
Typical Characteristics
No load
IN = OPEN
25°C
Figure 6-1
Supply Current vs Supply Voltage
Figure 6-3
Residual Voltage vs Load Current: Low Side
Figure 6-2
Residual Voltage vs Load Current: High Side
Figure 6-4
Current Limit vs R
SET