SLOS437R April   2004  – April 2024 TL103W , TL103WA , TL103WB

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: OP AMP1 (VREF at Noninverting input)
    6. 5.6 Electrical Characteristics: OP AMP2 (Independent Amplifier)
    7. 5.7 Typical Characteristics: TL103WB
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Internal Reference
      2. 6.3.2 Input Common Mode Range
      3. 6.3.3 EMI Rejection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Isolated Flyback CC/CV Feedback
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Constant Current Circuit
          2. 7.2.1.2.2 Constant Voltage Circuit
      2. 7.2.2 Constant Current Sink
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Revision History

Changes from Revision Q (December 2023) to Revision R (April 2024)

  • Changed TL103WB DDF (SOT-23, 8) status from advanced information (preview) to production data (active)Go

Changes from Revision P (November 2023) to Revision Q (December 2023)

  • Updated maximum dynamic impedance from 0.5 Ω to 0.8 Ω in Electrical Characteristics tableGo
  • Updated EMIRR IN+ values in EMIRR IN+ for Frequencies of Interest table Go

Changes from Revision O (October 2023) to Revision P (November 2023)

  • Updated typical large-signal voltage gain of TL103WB from 140V/mV to 210 V/mVGo
  • Updated minimum limit of supply-voltage rejection ratio of TL103WB from 80 dB to 99dBGo
  • Added footnote in Electrical Characteristics tables to specify specifications which have limits set by characterizationGo
  • Updated minimum limit of gain bandwidth product for TL103WB from 0.5MHz to 0.7MHzGo
  • Updated maximum limit of total supply current for TL103WB at 25℃ from 0.92 mA to 0.77mAGo
  • Updated maximum limit of total supply current for TL103WB at full temperature range from 1.6mA to 1.35mAGo
  • Updated minimum limit of large-signal voltage gain for TL103WB at 25℃ from 70V/mV to 77V/mVGo
  • Updated minimum limit of large-signal voltage gain for TL103WB at full temperature range from 35V/mV to 45V/mVGo
  • Added new CMRR specifications for TL103WBGo

Changes from Revision N (August 2023) to Revision O (October 2023)

  • Changed maximum input offset voltage, reference tolerance, total supply current and sink-current range in the Features sectionGo
  • Changed Typical Application Circuit figure to include TL103WB and Opto-emulatorGo
  • Changed TL103WB D (SOIC, 8) status from advanced information (preview) to production data (active)Go
  • Changed Thermal Information table to include latest thermal metrics Go
  • Added DDF information to Thermal Information tableGo
  •  Updated kSVR term to PSRRGo
  • Changed maximum short circuit current from ±60mA to ±68 mA Go
  • Maximum reference input voltage deviation over temperature range for TL103W was changed from 30mV to 35mVGo
  • Maximum reference input voltage deviation over temperature range for TL103WA was changed from 30mV to 26mVGo
  • Added figures to the Typical Characteristics section to highlight the TL103WB deviceGo
  • Added the Detailed Description and Application and Implementation sectionsGo
  • Added the Application and Implementation sectionsGo

Changes from Revision M (October 2016) to Revision N (August 2023)

  • Updated Features section to highlight TL103WBGo
  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added the TL103WB device information throughout the documentGo
  • Updated Description sectionGo
  • Updated Device Information table to include channel countGo
  • Removed DRJ package details and added DDF package for previewGo
  • Updated formatting for Electrical Characteristics tablesGo
  • Updated typical dynamic impedance from 0.2 Ω to 0.45 Ω in Electrical Characteristics tables Go

Changes from Revision L (February 2016) to Revision M (October 2016)

  • Changed positive and negative terminals OP AMP 2 in the D Package image of Pin Configuration and Functions Go

Changes from Revision K (October 2010) to Revision L (February 2016)

  • Added the Device Information table, Pin Configuration and Functions, ESD Ratings, Thermal Information, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sectionsGo
  • Changed Features from: 2 kV ESD Protection (HBM) to: 2.5-kV ESD Protection (HBM)Go
  • Changed the Zener diode component to VREF in the Typical Application Circuit Go
  • Changed the Zener diode component to VREF in the D Package of Pin Configuration and Functions Go

Changes from Revision J (September 2010) to Revision K ()