SBVS237 March   2014 TLC5955

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Terminal Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Terminal-Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Circuits
    3. 7.3 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Current Calculation
      2. 8.3.2 Register and Data Latch Configuration
        1. 8.3.2.1 769-Bit Common Shift Register
        2. 8.3.2.2 Grayscale (GS) Data Latch
        3. 8.3.2.3 Control Data Latch
        4. 8.3.2.4 Dot Correction (DC) Data Latch
        5. 8.3.2.5 Maximum Current (MC) Data Latch
        6. 8.3.2.6 Global Brightness Control (BC) Data Latch
        7. 8.3.2.7 Function Control (FC) Data Latch
      3. 8.3.3 Status Information Data (SID)
      4. 8.3.4 LED Open Detection (LOD)
      5. 8.3.5 LED Short Detection (LSD)
      6. 8.3.6 Noise Reduction
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Current Control (MC) Function
      2. 8.4.2 Dot Correction (DC) Function
      3. 8.4.3 Global Brightness Control (BC) Function
      4. 8.4.4 Grayscale (GS) Function (PWM Control)
        1. 8.4.4.1 Conventional PWM Control
        2. 8.4.4.2 Enhanced Spectrum (ES) PWM Control
        3. 8.4.4.3 Auto Display Repeat Function
        4. 8.4.4.4 Display Timing Reset Function
        5. 8.4.4.5 Auto Data Refresh Function
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Daisy-Chain Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Step-by-Step Design Procedure
          2. 9.2.1.2.2 Maximum Current (MC) Data
          3. 9.2.1.2.3 Global Brightness Control (BC) Data
          4. 9.2.1.2.4 Dot Correction (DC) Data
          5. 9.2.1.2.5 Grayscale (GS) Data
          6. 9.2.1.2.6 Other Control Data
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Terminal Configurations and Functions

DCA Package
HTSSOP-56
(Top View)
po_dca_bvs237.gif
RTQ Package
QFN-56
(Top View)
po_rtq_bvs237.gif

Terminal Functions

TERMINAL I/O DESCRIPTION
NAME DCA NUMBER RTQ NUMBER
GND 29, 56 8, 35 — Power ground
GSCLK 55 34 I Reference clock for the grayscale (GS) pulse width modulation (PWM) control for all outputs. Each GSCLK rising edge increments the grayscale counter for PWM control. When the LAT signal is input for a GS data write with the timing reset mode enabled, all constant-current outputs (OUTX0-OUTX15, where X = R, G, or B) are forced off, the grayscale counter is reset to 0, and the grayscale PWM timing controller is initialized.
LAT 3 38 I The LAT rising edge either latches the data from the common shift register into the GS data latch when the MSB of the common shift register is 0 or latches the data into the control data latch when the MSB of the common shift register is 1. When the display timing reset bit (TMGRST) in the control data latch is 1, the grayscale counter initialized at the LAT signal is input for a grayscale data write. Dot correction (DC) data in the control data latch are copied to DC data latch at the same time.
OUTB0 to OUTB15 4, 7, 10, 13, 16, 19, 22, 25, 32, 35, 38, 41, 44, 47, 50, 53 1, 4, 11, 14, 17, 20, 23, 26, 29, 32, 39, 42, 45, 48, 51, 54 O Constant-current outputs for the blue color group.
Multiple outputs can be configured in parallel to increase the constant-current capability. Different voltages can be applied to each output.
OUTG0 to OUTG15 6, 9, 12, 15, 18, 21, 24, 27, 30, 33, 36, 39, 42, 45, 48, 51 3, 6, 9, 12, 15, 18, 21, 24, 27, 30, 41, 44, 47, 50, 53, 56 O Constant-current outputs for the green color group.
Multiple outputs can be configured in parallel to increase the constant-current capability. Different voltages can be applied to each output.
OUTR0 to OUTR15 5, 8, 11, 14, 17, 20, 23, 26, 31, 34, 37, 40, 43, 46, 49, 52 2, 5, 10, 13, 16, 19, 22, 25, 28, 31, 40, 43, 46, 49, 52, 55 O Constant-current outputs for the red color group.
Multiple outputs can be configured in parallel to increase the constant-current capability. Different voltages can be applied to each output.
SCLK 2 37 I Serial data shift clock.
Data present on SIN are shifted to the LSB of the common shift register with the SCLK rising edge. Data in the shift register are shifted toward the MSB at each SCLK rising edge. The MSB data of the common shift register appears on SOUT.
SIN 1 36 I Serial data input for the 769-bit common shift register.
SOUT 28 7 O This bit is the serial data output of the 769-bit common shift register.
LED open detection (LOD) and LED short detection (LSD) can be read out with SOUT in the form of status information data (SID) after the LAT falling edge is input for a GS data write. SOUT is connected to the MSB of the 769-bit common shift register. Data are clocked out at the SCLK rising edge.
VCC 54 33 — Power-supply voltage
Thermal pad — The thermal pad is not connected to GND internally.
The thermal pad must be connected to GND via the PCB.