SLVSI38 October   2024 TLC69699-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device Comparison
  6. 5Pin Configuration and Functions
  7. 6Device and Documentation Support
    1. 6.1 Device Support
    2. 6.2 Documentation Support
      1. 6.2.1 Related Documentation
    3. 6.3 Receiving Notification of Documentation Updates
    4. 6.4 Support Resources
    5. 6.5 Trademarks
    6. 6.6 Electrostatic Discharge Caution
    7. 6.7 Glossary
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information
    1. 8.1 Tape and Reel Information
    2. 8.2 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TLC69699-Q1 SPI-compatible connectivity enables TLC696xx-Q1 device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the TLC696xx-Q1 device family. Jitter can be added to the continuous clock for EMI enhancement. The transmitted data is aligned to the continuous clock to maintain the timing requirements of the CCSI interface.

TLC69699-Q1 incorporates reporting of faults in both the TLC696xx-Q1 daisy chain and TLC69699-Q1 internal. Data transmission of register and brightness to the TLC696xx-Q1 daisy chain is CRC protected by TLC69699-Q1. In addition, both the data and continuous clock lines are guarded by TLC69699-Q1 for stuck-at faults.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TLC69699-Q1 SOT-23-THN (14) 4.20mm x 2.00mm
WSON (12) Wettable flank 3.00mm x 3.00mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value.
TLC69699-Q1 Typical Application Diagram Figure 3-1 Typical Application Diagram