SLVSFI5A October 2020 – December 2020 TLC6C5748-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VIH | High-level input voltage | SIN, SCLK, LAT, GSCLK | 0.70 × VCC | V | ||
VIL | Low-level input voltage | SIN, SCLK, LAT, GSCLK | 0.30 × VCC | V | ||
IOH | High-level output current | SOUT | –2 | mA | ||
IOL | Low-level output current | SOUT | 2 | mA | ||
fSCLK | Data shift clock frequency | SCLK | 25 | MHz | ||
fGSCLK | Grayscale control clock frequency | GSCLK | 33 | MHz | ||
tWH0 | High Pulse duration | SCLK | 10 | ns | ||
tWL0 | Low Pulse duration | SCLK | 10 | ns | ||
tWH1 | High Pulse duration | GSCLK | 10 | ns | ||
tWL1 | Low Pulse duration | GSCLK | 10 | ns | ||
tSU0 | Setup time | SIN to SCLK posedge | 5 | ns | ||
tSU1 | LAT negedge to SCLK posedge (REFRESH = 0) | 30 | ns | |||
tSU2 | LAT posedge for GS data written to GSCLK posedge when TMGRST = 0 | 50 | ns | |||
tSU3 | LAT posedge for GS data written to GSCLK posedge when TMGRST = 1 | 70 | ns | |||
tH0 | Hold time | SCLK posedge to SIN | 2 | ns | ||
tH1 | SCLK posedge to LAT posedge | 5 | ns | |||
tR0 | Rise time | SOUT | 3 | 5 | ns | |
tR0 | Fall time | SOUT | 3 | 5 | ns | |
tD0 | Propogation delay | SCLK posedge to SOUT | 20 | 30 | ns | |
tD1 | VCC = 3.6 V, GSCLK posedge to OUTX4 and OUTX11 on or off | 40 | ns | |||
tD2 | VCC = 3.6 V, GSCLK posedge to OUTX0 and OUTX15 on or off | 43 | ns | |||
tD3 | VCC = 3.6 V, GSCLK posedge to OUTX5 and OUTX10 on or off | 46 | ns | |||
tD4 | VCC = 3.6 V, GSCLK posedge to OUTX1 and OUTX14 on or off | 49 | ns | |||
tD5 | VCC = 3.6 V, GSCLK posedge to OUTX2 and OUTX13 on or off | 52 | ns | |||
tD6 | VCC = 3.6 V, GSCLK posedge to OUTX6 and OUTX9 on or off | 55 | ns | |||
tD7 | VCC = 3.6 V, GSCLK posedge to OUTX3 and OUTX12 on or off | 58 | ns | |||
tD8 | VCC = 3.6 V, GSCLK posedge to OUTX7 and OUTX8 on or off | 61 | ns | |||
tON_ERR | Output on-time error(1) | tOUTON-tGSCLK, VCC = 3.6 V to 5.5 V, GSXn = 0001h, GSCLK = 33MHz, DCXn and BCXn = 7Fh | –20 | 20 | ns |