SLLSFM6
June 2021
TLIN2022A-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Description (Continued)
5
Revision History
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
ESD Ratings - IEC
7.4
Thermal Information
7.5
Recommended Operating Conditions
7.6
Electrical Characteristics
7.7
Duty Cycle Characteristics
7.8
Switching Characteristics
7.9
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
LIN (Local Interconnect Network) Bus
9.3.1.1
LIN Transmitter Characteristics
9.3.1.2
LIN Receiver Characteristics
9.3.1.2.1
Termination
9.3.2
TXD
9.3.3
RXD (Receive Output)
9.3.4
VSUP (Supply Voltage)
9.3.5
GND (Ground)
9.3.6
EN (Enable Input)
9.3.7
Protection Features
9.3.8
TXD Dominant Time Out (DTO)
9.3.9
Bus Stuck Dominant System Fault: False Wake-Up Lockout
9.3.10
Thermal Shutdown
9.3.11
Undervoltage on VSUP
9.3.12
Unpowered Device and LIN Bus
9.4
Device Functional Modes
9.4.1
Normal Mode
9.4.2
Sleep Mode
9.4.3
Standby Mode
9.4.4
Wake-Up Events
9.4.4.1
Wake-Up Request (RXD)
9.4.4.2
Mode Transitions
10
Application Information Disclaimer
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedures
10.2.2.1
Normal Mode Application Note
10.2.2.2
Standby Mode Application Note
10.2.2.3
TXD Dominant State Timeout Application Note
10.2.3
Application Curves
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DMT|14
MPSS087B
D|14
MPDS177H
Thermal pad, mechanical data (Package|Pins)
DMT|14
QFND637
Orderable Information
sllsfm6_oa
sllsfm6_pm
8
Parameter Measurement Information
Figure 8-1
Test System: Operating Voltage Range with RX and TX Access: Parameters 9, 10
Figure 8-2
RX Response: Operating Voltage Range
Figure 8-3
LIN Bus Input Signal
Figure 8-4
LIN Receiver Test with RX access Parameters 17, 18, 19, 20
Figure 8-5
V
SUP_NON_OP
Parameters 11
Figure 8-6
Test Circuit for I
BUS_PAS_dom
; TXD = Recessive State V
BUS
= 0 V, Parameters 13
Figure 8-7
Test Circuit for I
BUS_PAS_rec
Param 14
Figure 8-8
Test Circuit for I
BUS_NO_GND
Loss of GND
Figure 8-9
Test Circuit for I
BUS_NO_BAT
Loss of Battery
Figure 8-10
Test Circuit Slope Control and Duty Cycle Parameters 27, 28, 29, 30
Figure 8-11
Definition of Bus Timing Parameters
Figure 8-12
Propagation Delay Test Circuit; Parameters 31, 32
Figure 8-13
Propagation Delay
Figure 8-14
Mode Transitions
Figure 8-15
Wakeup Through EN
Figure 8-16
Wakeup through LIN