SBVS160C May   2011  – January 2023 TLV1117LV

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Dropout Voltage
      3. 7.3.3 Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Thermal Protection
        2. 8.5.1.2 Power Dissipation
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Module
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TLV1117LV low-dropout (LDO) linear regulator is a low input voltage version of the popular TLV1117 voltage regulator.

The TLV1117LV is an extremely low-power device that consumes 500 times lower quiescent current than traditional 1117 voltage regulators, making the device designed for applications that mandate very low standby current. The TLV1117LV LDO is also stable with 0 mA of load current; there is no minimum load requirement, making the device a good choice for applications where the regulator must power very small loads during standby in addition to large currents on the order of 1 A during normal operation. The TLV1117LV offers excellent line and load transient performance, resulting in very small magnitude undershoots and overshoots of output voltage when the load current requirement changes from less than 1 mA to more than 500 mA.

A precision band-gap and error amplifier provides 1.5% accuracy. A very high power-supply rejection ratio (PSRR) enables use of the device for post-regulation after a switching regulator. Other valuable features include low output noise and low-dropout voltage.

The device is internally compensated to be stable with 0-Ω equivalent series resistance (ESR) capacitors. These key advantages enable the use of cost-effective, small-size ceramic capacitors. Cost-effective capacitors that have higher bias voltages and temperature derating can also be used if desired.

The TLV1117LV is available in a SOT-223 package.

Package Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
TLV1117LV DCY (SOT-223, 4) 6.50 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-C9EA2D82-F0E5-4963-B621-AE1EA1A4F6D0-low.gif Typical Application Circuit