SLOS351E February   2004  – November 2016 TLV271 , TLV272 , TLV274

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Recommended Operating Conditions
    3. 7.3  Thermal Information: TLV271
    4. 7.4  Thermal Information: TLV272
    5. 7.5  Thermal Information: TLV274
    6. 7.6  Electrical Characteristics: DC Characteristics
    7. 7.7  Electrical Characteristics: Input Characteristics
    8. 7.8  Electrical Characteristics: Output Characteristics
    9. 7.9  Electrical Characteristics: Power Supply
    10. 7.10 Electrical Characteristics: Dynamic Performance
    11. 7.11 Electrical Characteristics: Noise/Distortion Performance
    12. 7.12 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail to Rail Output
      2. 8.3.2 Offset Voltage
      3. 8.3.3 Driving a Capacitive Load
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
      1. 9.3.1 General Configurations
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resource
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

TLV271: DBV Package
5-Pin SOT-23
Top View
TLV271 TLV272 TLV274 po_dbv_los351.gif
TLV271: D and P Packages
8-Pin SOIC and PDIP
Top View
TLV271 TLV272 TLV274 po_d_p_los351.gif

Pin Functions

PIN I/O DESCRIPTION
NAME TLV271
SOT-23 SOIC
PDIP
GND 2 4 Negative (lowest) supply or ground (for single-supply operation)
IN– 4 2 I Negative (inverting) input
IN+ 3 3 I Positive (noninverting) input
NC 1, 5, 8 No internal connection (can be left floating)
OUT 1 6 O Output
VDD 5 7 Positive (highest) supply
TLV272: D, DGK, and P Packages
8-Pin SOIC, VSSOP, and PDIP
Top View
TLV271 TLV272 TLV274 po_d_dgk_p_los351.gif

Pin Functions

PIN I/O DESCRIPTION
NAME TLV272
SOIC
VSSOP
PDIP
GND 4 Negative (lowest) supply or ground (for single-supply operation)
1IN– 2 I Inverting input, channel 1
1IN+ 3 I Noninverting input, channel 1
2IN– 6 I Inverting input, channel 2
2IN+ 5 I Noninverting input, channel 2
1OUT 1 O Output, channel 1
2OUT 7 O Output, channel 2
VDD 8 Positive (highest) supply
TLV274: D, PW, and N Packages
14-Pin SOIC, TSSOP, and PDIP
Top View
TLV271 TLV272 TLV274 po_d_pw_n_los351.gif

Pin Functions

PIN I/O DESCRIPTION
NAME TLV274
SOIC
TSSOP
PDIP
GND 11 Negative supply or ground (for single-supply operation)
1IN– 2 I Inverting input, channel 1
1IN+ 3 I Noninverting input, channel 1
2IN– 6 I Inverting input, channel 2
2IN+ 5 I Noninverting input, channel 2
3IN– 9 I Inverting input, channel 3
3IN+ 10 I Noninverting input, channel 3
4IN– 13 I Inverting input, channel 4
4IN+ 12 I Noninverting input, channel 4
1OUT 1 O Output, channel 1
2OUT 7 O Output, channel 2
3OUT 8 O Output, channel 3
4OUT 14 O Output, channel 4
VDD 4 Positive supply