SBOS551D March   2011  – January 2025 TLV3011-Q1 , TLV3011B-Q1 , TLV3012-Q1 , TLV3012B-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Drain Output (TLV3011-Q1 and TLV3011B-Q1)
      2. 7.4.2 Push-Pull Output (TLV3012-Q1 and TLV3012B-Q1)
      3. 7.4.3 Voltage Reference
      4. 7.4.4 Internal Hysteresis
      5. 7.4.5 TLV3011B-Q1 and TLV3012B-Q1 Fail-Safe inputs
      6. 7.4.6 TLV3011B-Q1 and TLV3012B-Q1 Power On Reset
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adding External Hysteresis
    2. 8.2 Typical Application
      1. 8.2.1 Under-Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Power-On Reset
      2. 8.3.2 Relaxation Oscillator
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.5.1 Layout Guidelines

To minimize supply noise, power supplies must be capacitively decoupled by a 0.1μF ceramic capacitor. Comparators are sensitive to input noise and precautions such as proper grounding (use of ground plane), supply bypassing, and guarding of high-impedance nodes minimize the effects of noise and help specified performance.