SBOS551D March   2011  – January 2025 TLV3011-Q1 , TLV3011B-Q1 , TLV3012-Q1 , TLV3012B-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Drain Output (TLV3011-Q1 and TLV3011B-Q1)
      2. 7.4.2 Push-Pull Output (TLV3012-Q1 and TLV3012B-Q1)
      3. 7.4.3 Voltage Reference
      4. 7.4.4 Internal Hysteresis
      5. 7.4.5 TLV3011B-Q1 and TLV3012B-Q1 Fail-Safe inputs
      6. 7.4.6 TLV3011B-Q1 and TLV3012B-Q1 Power On Reset
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adding External Hysteresis
    2. 8.2 Typical Application
      1. 8.2.1 Under-Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Power-On Reset
      2. 8.3.2 Relaxation Oscillator
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.6 TLV3011B-Q1 and TLV3012B-Q1 Power On Reset

The TLV3011B-Q1 and TLV3012B-Q1 have an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry is activated for up to 1.9ms after the minimum supply voltage threshold is crossed, or immediately when the supply voltage drops below minimum supply. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (VID). This delay is long enough to allow the reference output to stabilize with up to a 10nF capacitive load.

During the POR period (ton), the outputs are as follows:

  • The open drain output TLV3011B-Q1 is high (Hi-Z).

  • The push-pull output TLV3012B-Q1 is low (sinking).

TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1 Power-On Reset Example Timing Diagram for Push-Pull OutputFigure 7-1 Power-On Reset Example Timing Diagram for Push-Pull Output

Note the nature of an open collector output is that that the output rises with the pull-up voltage during the HI-Z POR period.