SBOS779D June 2016 – May 2017 TLV6001 , TLV6002 , TLV6004
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | Supply voltage | 7 | V | |
Signal input pins, voltage(2) | (V–) – 0.5 | (V+) + 0.5 | V | |
Current | Signal input pins, current(2) | –10 | 10 | mA |
Output short-circuit(3) | Continuous | mA | ||
Temperature | Operating, TA | –40 | 150 | °C |
Junction, TJ | 150 | °C | ||
Storage, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VS | Supply voltage | 1.8 | 5.5 | V |
TA | Specified temperature range | –40 | 125 | °C |
THERMAL METRIC(1) | TLV6001 | UNIT | ||
---|---|---|---|---|
DBV (SOT-23) | DCK (SC70) | |||
5 PINS | 5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 228.5 | 281.4 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 99.1 | 91.6 | °C/W |
RθJB | Junction-to-board thermal resistance | 54.6 | 59.6 | °C/W |
ψJT | Junction-to-top characterization parameter | 7.7 | 1.5 | °C/W |
ψJB | Junction-to-board characterization parameter | 53.8 | 58.8 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
THERMAL METRIC(1) | TLV6002 | UNIT | ||
---|---|---|---|---|
D (SOIC) | DGK (VSSOP) | |||
8 PINS | 8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 138.4 | 191.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 89.5 | 61.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 78.6 | 111.9 | °C/W |
ψJT | Junction-to-top characterization parameter | 29.9 | 5.1 | °C/W |
ψJB | Junction-to-board characterization parameter | 78.1 | 110.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
THERMAL METRIC(1) | TLV6004 | UNIT | |
---|---|---|---|
PW (TSSOP) | |||
14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 121.0 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 49.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 62.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 5.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 62.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | 0.75 | 4.5 | mV | |||
dVOS/dT | VOS vs temperature | TA = –40°C to 125°C | 2 | μV/°C | |||
PSRR | Power-supply rejection ratio | 86 | dB | ||||
INPUT BIAS CURRENT | |||||||
IB | Input bias current | TA = 25°C | ±1.0 | pA | |||
IOS | Input offset current | ±1.0 | pA | ||||
INPUT IMPEDANCE | |||||||
ZID | Differential | 100 || 1 | MΩ || pF | ||||
ZIC | Common-mode | 1 || 5 | 1013Ω || pF | ||||
INPUT VOLTAGE RANGE | |||||||
VCM | Common-mode voltage range | No phase reversal, rail-to-rail input | (V–) – 0.2 | (V+) + 0.2 | V | ||
CMRR | Common-mode rejection ratio | VCM = –0.2 V to 5.7 V | 60 | 76 | dB | ||
OPEN-LOOP GAIN | |||||||
AOL | Open-loop voltage gain | 0.3 V < VO < (V+) – 0.3 V, RL = 2 kΩ | 90 | 110 | |||
Phase margin | VS = 5.0 V, G = +1 | 65 | degrees | ||||
OUTPUT | |||||||
VO | Voltage output swing from supply rails | RL = 100 kΩ | 5 | mV | |||
RL = 2 kΩ | 75 | 100 | mV | ||||
ISC | Short-circuit current | ±15 | mA | ||||
RO | Open-loop output impedance | 2300 | Ω | ||||
FREQUENCY RESPONSE | |||||||
GBW | Gain-bandwidth product | 1 | MHz | ||||
SR | Slew rate | 0.5 | V/µs | ||||
tS | Settling time | To 0.1%, VS = 5.0 V, 2-V step , G = +1 | 5 | μs | |||
NOISE | |||||||
Input voltage noise (peak-to-peak) | f = 0.1 Hz to 10 Hz | 6 | μVPP | ||||
en | Input voltage noise density | f = 1 kHz | 28 | nV/√Hz | |||
in | Input current noise density | f = 1 kHz | 5 | fA/√Hz | |||
POWER SUPPLY | |||||||
VS | Specified voltage range | 1.8 (±0.9) | 5.5 (±2.75) | V | |||
IQ | Quiescent current per amplifier | IO = 0 mA, VS = 5.0 V | 75 | 100 | µA | ||
Power-on time | VS = 0 V to 5 V, to 90% IQ level | 10 | µs |
TITLE | FIGURE |
---|---|
Open-Loop Gain and Phase vs Frequency | Figure 1 |
Quiescent Current vs Supply Voltage | Figure 2 |
Offset Voltage Production Distribution | Figure 3 |
Offset Voltage vs Common-Mode Voltage (Maximum Supply) | Figure 4 |
CMRR and PSRR vs Frequency (RTI) | Figure 5 |
0.1-Hz to 10-Hz Input Voltage Noise (5.5 V) | Figure 6 |
Input Voltage Noise Spectral Density vs Frequency (1.8 V, 5.5 V) | Figure 7 |
Input Bias and Offset Current vs Temperature | Figure 8 |
Open-Loop Output Impedance vs Frequency | Figure 9 |
Maximum Output Voltage vs Frequency and Supply Voltage | Figure 10 |
Output Voltage Swing vs Output Current (over Temperature) | Figure 11 |
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (1.8 V) | Figure 12 |
Small-Signal Step Response, Noninverting (1.8 V) | Figure 13 |
Small-Signal Step Response, Noninverting ( 5.5 V) | Figure 14 |
Large-Signal Step Response, Noninverting (1.8 V) | Figure 15 |
Large-Signal Step Response, Noninverting ( 5.5 V) | Figure 16 |
No Phase Reversal | Figure 17 |
EMIRR IN+ vs Frequency | Figure 18 |