10.2.1.1 Output Filter Design

The inductor and output capacitor together provide a low-pass frequency filter. To simplify this process, Table 2 outlines possible inductor and capacitor value combinations.

10.2.1.2 Inductor Selection

The main parameters for inductor selection is inductor value and then saturation current of the inductor. To calculate the maximum inductor current under static load conditions, Equation 1 is given:

Equation 1.

where

• I_OUT,MAX is the maximum output current
• ΔI_L is the inductor current ripple
• f_SW is the switching frequency
• L is the inductor value

It is recommended to choose a saturation current for the inductor that is approximately 20% to 30% higher than I_L,MAX. In addition, DC resistance and size should also be taken into account when selecting an appropriate inductor. The recommended inductors are listed in Table 3.

10.2.1.3 Input and Output Capacitor Selection

The input capacitor is the low impedance energy source for the converter that helps provide stable operation. The closer the input capacitor is placed to the V_IN and GND pins, the lower the switch ring. A low ESR multilayer ceramic capacitor is recommended for best filtering. For most applications, 4.7-µF input capacitance is sufficient; a larger value reduces input voltage ripple.

The architecture of the TLV62565/6 allow use of tiny ceramic-type output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are thus recommended. To keep its resistance up to high frequencies and to achieve narrow capacitance variation with temperature, it is recommended to use X7R or X5R dielectric. The TLV62565/6 are designed to operate with an output capacitance of 10 µF to 47 µF, as outlined in Table 2.

10.2.2.1 Setting the Output Voltage

An external resistor divider is used to set output voltage. By selecting R1 and R2, the output voltage is programmed to the desired value. When the output voltage is regulated, the typical voltage at the FB pin is V_FB. Equation 2, Equation 3, and Equation 4 can be used to calculate R1 and R2.

When sizing R2, in order to achieve low current consumption and acceptable noise sensitivity, use a minimum of 5 μA for the feedback current I_FB. Larger currents through R2 improve noise sensitivity and output voltage accuracy but increase current consumption.

Equation 2.

Equation 3.

Equation 4.

Due to the maximum duty cycle limit, the output voltage is out of regulation if the input voltage is too low. For proper regulation, V_OUT should be set below V_{IN_MIN} as shown in Equation 5.

Equation 5.

where

• V_{IN_MIN}, the minimum value of the input voltage;

10.2.2.2 Loop Stability

The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:

• Switching node, SW
• Inductor current, I_L
• Output ripple voltage, V_OUT(AC)

These are the basic signals that need to be measured when evaluating a switching converter. When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable. This is often a result of board layout and/or L-C combination. Applications with the recommended L-C combinations in Table 2 are designed for good loop stability as well as fast load transient response.

As a next step in the evaluation of the regulation loop, the load transient response is illustrated. The TLV62565/6 use a constant on time with valley current mode control, so the on time of the high-side MOSFET is relatively consistent from cycle to cycle when a load transient occurs. Whereas the off time adjusts dynamically in accordance with the instantaneous load change and brings V_OUT back to the regulated value.

During recovery time, V_OUT can be monitored for settling time, overshoot, or ringing which helps judge the stability of the converter. Without any ringing, the loop usually has more than 45° of phase margin.