The TLV62585 device is a high-frequency synchronous step-down converter optimized for compact solution size and high efficiency. The device integrates switches capable of delivering an output current up to 3 A. At medium to heavy loads, the converter operates in pulse width modulation (PWM) mode with typical 1.5-MHz switching frequency. At light load, the device automatically enters Power Save Mode (PSM) to maintain high efficiency over the entire load current range. In shutdown, the current consumption is reduced to less than 2 μA.
The internal compensation circuit allows a compact solution and small external components. An internal soft start circuit limits the inrush current during startup. Other features like short circuit protection, thermal shutdown protection, output discharge and power good are built-in.
The device is available in a 2-mm × 2-mm QFN or 1.6-mm x 1-6-mm SOT563 package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TLV62585RWT | QFN (12) | 2.00 mm × 2.00 mm |
TLV62585DRL | SOT563 (6) | 1.60 mm x 1.60 mm |
TLV62585PDRL |
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Changes from E Revision (June 2018) to F Revision
Changes from D Revision (April 2018) to E Revision
Changes from C Revision (November 2017) to D Revision
Changes from B Revision (September 2017) to C Revision
Changes from A Revision (August 2017) to B Revision
Changes from * Revision (July 2017) to A Revision
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | RWT (QFN) | DRL (SOT563) | PDRL (SOT563) | ||
VIN | 1, 10 | 3 | 3 | PWR | Power supply voltage pin. |
SW | 2, 11 | 2 | 2 | PWR | Switch pin connected to the internal FET switches and inductor terminal. Connect the inductor of the output filter to this pin. |
GND | - | 1 | 1 | PWR | Ground pin. |
PGND | 3, 12 | - | - | PWR | Power ground pin. |
AGND | 4 | - | - | - | Ground pin. |
NC | 5, 6 | 6 | - | - | No connection pin. Leave these pins open, or connect those pins to the output or to AGND. |
FB | 7 | 5 | 5 | I | Feedback pin for the internal control loop. Connect this pin to an external feedback divider. |
EN | 8 | 4 | 4 | I | Device enable logic input. Logic high enables the device, logic low disables the device and turns it into shutdown. Do not leave floating. |
PG | 9 | - | 6 | O | Power good open drain output pin. The pull-up resistor can not be connected to any voltage higher than 5.5 V. If unused, leave it floating or connect to AGND. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage at Pins(1) | VIN, EN, PG | –0.3 | 6 | V |
FB | –0.3 | 3 | ||
SW (DC) | –0.3 | VIN + 0.3 | ||
SW (AC, less than 10ns)(2) | –3.0 | 9 | ||
Temperature | Operating Junction, TJ | –40 | 150 | °C |
Storage, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VIN | Input voltage range | 2.5 | 5.5 | V | |
VOUT | Output voltage range | 0.6 | VIN | V | |
ISINK_PG | Sink current at PG pin | 1 | mA | ||
IOUT | Output current | 0 | 3 | A | |
TJ | Operating junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | TLV62585 | UNIT | ||
---|---|---|---|---|
RWT [QFN] | DRL [SOT] | |||
RθJA | Junction-to-ambient thermal resistance | 95.7 | 132.7 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 74.1 | 43.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 29.4 | 27.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 5.8 | 1.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 29.7 | 26.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
The TLV62585 is a high-efficiency synchronous step-down converter. The device operates with an adaptive off-time with peak current control scheme. The device operates at typically 1.5-MHz frequency pulse width modulation (PWM) at moderate to heavy load currents. Based on the VIN/VOUT ratio, a simple circuit sets the required off time for the low-side MOSFET. It makes the switching frequency relatively constant regardless of the variation of input voltage, output voltage, and load current.
The device automatically enters Power Save Mode to improve efficiency at light load when the inductor current becomes discontinuous. In Power Save Mode, the converter reduces switching frequency and minimizes current consumption. In Power Save Mode, the output voltage rises slightly above the nominal output voltage. This effect is minimized by increasing the output capacitor, or adding a feed forward capacitor, as shown in Figure 14.
The device offers low input-to-output voltage difference by entering 100% duty cycle mode. In this mode, the high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. The minimum input voltage to maintain output regulation, depending on the load current and output voltage, is calculated as:
After enabling the device, internal soft startup circuitry ramps up the output voltage which reaches nominal output voltage during a startup time. This avoids excessive inrush current and creates a smooth output voltage rise slope. It also prevents excessive voltage drops of primary cells and rechargeable batteries with high internal impedance.
The TLV62585 is able to start into a pre-biased output capacitor. The converter starts with the applied bias voltage and ramps the output voltage to its nominal value.
The switch current limit prevents the device from high inductor current and from drawing excessive current from the battery or input voltage rail. Excessive current might occur with a shorted or saturated inductor or a over load or shorted output circuit condition. If the inductor current reaches the threshold ILIM, the high-side MOSFET is turned off and the low-side MOSFET is turned on to ramp down the inductor current with an adaptive off-time.
When this switch current limits is triggered 32 times, the device reduces the current limit for further 32 cycles and then stops switching to protect the output. The device then automatically start a new startup after a typical delay time of 500 μs has passed. This is named HICCUP short circuit protection. The devices repeat this mode until the high load condition disappears. HICCUP protection is also enabled during the startup.
To avoid misoperation of the device at low input voltages, an undervoltage lockout (UVLO) is implemented, which shuts down the device at voltages lower than VUVLO with a hysteresis of 150 mV.
The device goes into thermal shutdown and stops switching when the junction temperature exceeds TJSD. When the device temperature falls below the threshold by 20°C, the device returns to normal operation automatically.
The device is enabled by setting the EN pin to a logic HIGH. Accordingly, shutdown mode is forced if the EN pin is pulled LOW with a shutdown current of typically 0.7 μA.
In shutdown mode, the internal power switches as well as the entire control circuitry are turned off. An internal output discharge FET discharges the output through the SW pin smoothly.
The TLV62585 has a power good output. The power good goes high impedance once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below typically 90% of the nominal voltage. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power good output requires a pull-up resistor connecting to any voltage rail less than 5.5 V. The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin unconnected when not used.
DEVICE CONDITIONS | LOGIC STATUS | ||
---|---|---|---|
HIGH Z | LOW | ||
Enable | EN = High, VFB ≥ VPG | √ | |
EN = High, VFB ≤ VPG | √ | ||
Shutdown | EN = Low | √ | |
Thermal Shutdown | √ | ||
UVLO | 1.4 V < VIN < 2.3 V | √ | |
Power Supply Removal | VIN ≤ 1.4 V | √ |
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TLV62585 is a synchronous step-down converter in which output voltage is adjusted by component selection. The following section discusses the design of the external components to complete the power supply design for several input and output voltage options by using typical applications as a reference.
For this design example, use the parameters listed in Table 2 as the input parameters.
DESIGN PARAMETER | EXAMPLE VALUE |
---|---|
Input voltage | 2.5 V to 5.5 V |
Output voltage | 1.8 V |
Maximum output current | 3 A |
Table 3 lists the components used for the example.
REFERENCE | DESCRIPTION | MANUFACTURER |
---|---|---|
C1 | 10 µF, Ceramic capacitor, 10 V, X7R, size 0805, GRM21BR71A106ME51 | Murata |
C2 | 22 µF, Ceramic capacitor, 6.3 V, X7T, size 0805, GRM21BD70J226ME44 | Murata |
C3 | Optional | Std |
L1 | 1 µH, Power Inductor, size 4 mm × 4 mm × 1.5 mm, XFL4020-102ME | Coilcraft |
R1 | Depending on the output voltage, 1%, size 0603; | Std |
R2 | 100 kΩ, Chip resistor, 1/16 W, 1%, size 0603; | Std |
R3 | 1 MΩ, Chip resistor, 1/16 W, 1%, size 0603 | Std |
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The output voltage is set by an external resistor divider according to Equation 2:
R2 must not be higher than 100 kΩ to achieve high efficiency at light load while providing acceptable noise sensitivity.
The inductor and the output capacitor together provide a low-pass filter. To simplify the selection process, Table 4 outlines possible inductor and capacitor value combinations for most applications.
NOMINAL L [µH](2) | NOMINAL COUT [µF](3)(4) | |||
---|---|---|---|---|
10 | 22 | 47 | 100 | |
0.47 | ||||
1 | + | +(1) | + | |
2.2 |
The main parameter for the inductor selection is the inductor value and then the saturation current of the inductor. To calculate the maximum inductor current under static load conditions, Equation 3 is given.
where
TI recommends choosing the saturation current for the inductor 20% to 30% higher than the IL,MAX, out of Equation 3. A higher inductor value is also useful to lower ripple current but increases the transient response time as well.
The architecture of the TLV62585 allows use of tiny ceramic-type output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are thus recommended. To keep its resistance up to high frequencies and to achieve narrow capacitance variation with temperature, it is recommended to use X7R or X5R dielectric.
The input capacitor is the low impedance energy source for the converter that helps provide stable operation. A low ESR multilayer ceramic capacitor is recommended for best filtering. For most applications, 10-μF input capacitor is sufficient; a larger value reduces input voltage ripple.
The TLV62585 is designed to operate with an output capacitor of 10 μF to 47 μF, as outlined in Table 4.
A feed forward capacitor reduces the output ripple in PSM and improves the load transient response. A 22-pF capacitor is good for the 1.8-V output typical application.
VIN = 5 V, VOUT = 1.8 V, TA = 25 ºC, unless otherwise noted.
VOUT = 1.2 V |
VOUT = 2.5 V |
VIN = 5 V |
VIN = 5 V |
IOUT = 0.1 A |
IOUT = 3 A |
No Load |
IOUT = 0.1 A to 3 A | C3 = 22 pF |
IOUT = 0.1 A |
VOUT = 1.8 V |
VOUT = 3.3 V |
VOUT = 1.8 V |
IOUT = 1 A |
IOUT = 0.1 A | C3 = 22 pF |
ROUT = 0.6 Ω |
IOUT = 0.1 A to 3 A |
IOUT = 0.1 A |
The device is designed to operate from an input voltage supply range from 2.5 V to 5.5 V. Ensure that the input power supply has a sufficient current rating for the application.