SBOS817I June   2017  – August 2021 TLV6741 , TLV6742

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information for Single Channel
    5. 7.5 Thermal Information for Dual Channel
    6. 7.6 Electrical Characteristics
    7. 7.7 TLV6741: Typical Characteristics
    8. 7.8 TLV6742: Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 THD+ Noise Performance
      2. 8.3.2 Operating Voltage
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 EMI Rejection
      5. 8.3.5 Electrical Overstress
      6. 8.3.6 Typical Specifications and Distributions
      7. 8.3.7 Shutdown Function
      8. 8.3.8 Packages With an Exposed Thermal Pad
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single-Supply Electret Microphone Preamplifier With Speech Filter
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

Figure 6-1 TLV6741 DCK Package
5-Pin SC70
Top View
Table 6-1 Pin Functions: TLV6741
PIN I/O DESCRIPTION
NAME NO.
IN+ 1 I Noninverting input
IN– 3 I Inverting input
OUT 4 O Output
V+ 5 — Positive (highest) supply
V– 2 — Negative (lowest) supply or ground (for single-supply operation)
Figure 6-2 TLV6742 D, DGK, PW, and DDF Package
8-Pin SOIC, VSSOP, TSSOP, and SOT-23
Top View
Connect thermal pad to V–. See Section 8.3.8 for more information.
Figure 6-3 TLV6742 DSG Package
8-Pin WSON With Exposed Thermal Pad
Top View
Table 6-2 Pin Functions: TLV6742
PIN I/O DESCRIPTION
NAME NO.
IN1– 2 I Inverting input, channel 1
IN1+ 3 I Noninverting input, channel 1
IN2– 6 I Inverting input, channel 2
IN2+ 5 I Noninverting input, channel 2
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
V– 4 — Negative (lowest) supply or ground (for single-supply operation)
V+ 8 — Positive (highest) supply
Figure 6-4 TLV6742S RUG Package
10-Pin X2QFN
Top View
Table 6-3 Pin Functions: TLV6742S
PIN I/O DESCRIPTION
NAME NO.
IN1– 9 I Inverting input, channel 1
IN1+ 10 I Noninverting input, channel 1
IN2– 5 I Inverting input, channel 2
IN2+ 4 I Noninverting input, channel 2
OUT1 8 O Output, channel 1
OUT2 6 O Output, channel 2
SHDN1 2 I Shutdown: low = amp disabled, high = amp enabled. Channel 1. See Section 8.3.7 for more information.
SHDN2 3 I Shutdown: low = amp disabled, high = amp enabled. Channel 2. See Section 8.3.7 for more information.
V– 1 I or — Negative (lowest) supply or ground (for single-supply operation)
V+ 7 I Positive (highest) supply