SLVSB67C November   2011  – June 2017 TLV70012-Q1 , TLV70018-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Dropout Voltage
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 Operation with VIN Less than 2 V
      3. 7.4.3 Operation with VIN Greater than 2 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
      1. 10.4.1 Thermal Calculations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Package Mounting
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

Input and output capacitors should be placed as close to the device pins as possible. To improve ac performance such as PSRR, output noise, and transient response, the board is recommended to be designed with separate ground planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should be connected directly to the GND pin of the device. High ESR capacitors may degrade PSRR performance.

10.2 Layout Example

TLV70018-Q1 TLV70012-Q1 layout_example_slvsa61.gif Figure 23. TLV700xx Layout Example

10.3 Thermal Considerations

Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum.

To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions.

10.4 Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air.

Thermal performance data for TLV70018-Q1 and TLV70012-Q1 were gathered using the TLV700 evaluation module (EVM), a 2-layer board with two ounces of copper per side. Corresponding thermal performance data are given in Thermal Information. Note that this board has provision for soldering not only the SOT23-5 package on the bottom layer, but also the SC-70 package on the top layer. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink effectiveness.

10.4.1 Thermal Calculations

Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current and the voltage drop across the output pass element, as shown in Equation 1.

Equation 1. TLV70018-Q1 TLV70012-Q1 qu1_slvsa61.gif

where

  • PD is continuous power dissipation
  • IOUT is output current
  • VIN is input voltage
  • VOUT is output voltage

Since IQ << IOUT, the term IQ × VIN is always ignored.

For a device under operation at a given ambient air temperature (TA), use Equation 2 to calculate the junction temperature (TJ).

Equation 2. TLV70018-Q1 TLV70012-Q1 qu4_slvsa61.gif

where

  • ZθJA is the junction-to-ambient air temperature thermal impedance

Use Equation 3 to calculate the rise in junction temperature due to power dissipation.

Equation 3. TLV70018-Q1 TLV70012-Q1 qu2_slvsa61.gif

For a given maximum junction temperature (TJ(MAX), use Equation 4 to calculate the maximum ambient air temperature (TA(MAX) at which the device can operate.

Equation 4. TLV70018-Q1 TLV70012-Q1 qu3_slvsa61.gif