SLVSGU2E
February 2023 – April 2024
TLV709
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Wide Supply Range
6.3.2
Low Quiescent Current
6.3.3
Dropout Voltage (VDO)
6.3.4
Current Limit
6.3.5
Leakage Null Control Circuit
6.4
Device Functional Modes
6.4.1
Normal Operation
6.4.2
Dropout Operation
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Setting VOUT for the TLV70901 Adjustable LDO
7.2.2.2
External Capacitor Requirements
7.2.2.3
Input and Output Capacitor Requirements
7.2.2.4
Reverse Current
7.2.2.5
Feed-Forward Capacitor (CFF)
7.2.2.6
Power Dissipation (PD)
7.2.2.7
Estimating Junction Temperature
7.3
Best Design Practices
7.4
Power Supply Recommendations
7.5
Layout
7.5.1
Layout Guidelines
7.5.1.1
Power Dissipation
7.5.2
Layout Examples
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.1.1.1
Evaluation Module
8.1.1.2
Spice Models
8.1.2
Device Nomenclature
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PK|3
MHSI001B
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
PK|3
PPTD070
Orderable Information
slvsgu2e_oa
slvsgu2e_pm
7.2
Typical Application
Figure 7-1
Typical Application Circuit (Fixed-Voltage Version)
Figure 7-2
TLV70901 Adjustable LDO Regulator Programming
NOTE: Dotted lines indicate an optional input capacitor. See the
Recommended Operating Conditions
table and the
Input and Output Capacitor Requirements
section.
Table 7-1 Adjustable Output Voltage for Resistors R1 and R2
OUTPUT VOLTAGE (V)
R1 (MΩ)
R2 (MΩ)
1.8
0.499
1
2.8
1.33
1
5.0
3.16
1