SLVSGU2E February   2023  – April 2024 TLV709

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Wide Supply Range
      2. 6.3.2 Low Quiescent Current
      3. 6.3.3 Dropout Voltage (VDO)
      4. 6.3.4 Current Limit
      5. 6.3.5 Leakage Null Control Circuit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting VOUT for the TLV70901 Adjustable LDO
        2. 7.2.2.2 External Capacitor Requirements
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Power Dissipation
      2. 7.5.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-20221120-SS0I-KRMX-VQN7-T98SQZL1BWNW-low.svgFigure 4-1 DBV Package (Fixed),5-Pin SOT-23(Top View)
GUID-20221120-SS0I-X6LM-RZNL-SJCXTNFPM6DF-low.svgFigure 4-2 DBV Package (Adjustable),
5-Pin SOT-23(Top View)

 

GUID-20221115-SS0I-PMDG-MNDZ-W0MWBRNL247J-low.svgFigure 4-3 TLV709xxPKR PK Package (IN Tab),
3-Pin SOT-89(Top View)
GUID-20221115-SS0I-N39H-VCXB-8L8ZJ6PPX8BQ-low.svgFigure 4-4 TLV709AxxPKR PK Package (GND Tab),3-Pin SOT-89(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME DBV (Fixed) DBV
(Adj)
PK
(IN Tab)
PK
(GND Tab)
GND 2 2 1 2, tab Ground pin.
IN 1 1 2, tab 3 I Input supply pin. See the Recommended Operating Conditions table and the Input and Output Capacitor Requirements section for more information.
OUT 5 5 3 1 O Output of the regulator. See the Recommended Operating Conditions table and the Input and Output Capacitor Requirements section for more information.
FB 4 I In the adjustable configuration, this pin sets the output voltage with the help of a feedback divider.
NC 3, 4 3 Not internally connected. Leave this pin open or tied to ground for improved thermal performance.