SLVSES2J
August 2018 – May 2021
TLV803E
,
TLV809E
,
TLV810E
PRODMIX
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Timing Diagrams
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Voltage (VDD)
8.3.2
VDD Hysteresis
8.3.3
VDD Glitch Immunity
8.3.4
Manual Reset (MR) Input for X2SON (DPW) Package Only
8.3.5
Output Logic
8.3.5.1
RESET Output, Active-Low
8.3.5.2
RESET Output, Active-High
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > VDD(min))
8.4.2
VDD Between VPOR and VDD(min)
8.4.3
Below Power-On-Reset (VDD < VPOR)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application - Voltage Rail Monitoring
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Typical Application - Overvoltage Monitoring
9.3.1
Design Requirements
9.3.2
Detailed Design Procedure
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Device Nomenclature
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DPW|5
MPSS088
DCK|3
MPDS295F
DBZ|3
MPDS108G
Thermal pad, mechanical data (Package|Pins)
DPW|5
QFND567C
Orderable Information
slvses2j_oa
slvses2j_pm
11.2
Layout Example
Figure 11-1
TLV803E, TLV809E, and TLV810E SOT23 (DBZ) Layout Example
Figure 11-2
TLV803E, TLV809E, and TLV810E SOT23 (DBZ) V pinout Layout Example
Figure 11-3
TLV803E, TLV809E, and TLV810E X2SON (DPW) Layout Example