SBOSAK0A June   2024  – August 2024 TLV9044-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Quad Channel
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Voltage
      2. 6.3.2 Rail-to-Rail Input
      3. 6.3.3 Rail-to-Rail Output
      4. 6.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 6.3.5 Capacitive Load and Stability
      6. 6.3.6 Overload Recovery
      7. 6.3.7 EMI Rejection
      8. 6.3.8 Electrical Overstress
      9. 6.3.9 Input and ESD Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 TLV904x-Q1 Low-Side, Current Sensing Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4.     Trademarks
    5. 8.4 Electrostatic Discharge Caution
    6. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

TLV9044-Q1 TLV9041-Q1 DBV Package:5-Pin SOT-23#GUID-8F439702-DE75-4AC5-A9E5-33DC7A12A25F/GUID-50A9AC23-0D69-4AF3-AA7D-02F9EE7DB8BCTop ViewFigure 4-1 TLV9041-Q1 DBV Package:
5-Pin SOT-23(1)
Top View
TLV9044-Q1 TLV9041-Q1 DCK Package:5-Pin SC70#GUID-8F439702-DE75-4AC5-A9E5-33DC7A12A25F/GUID-50A9AC23-0D69-4AF3-AA7D-02F9EE7DB8BCTop ViewFigure 4-2 TLV9041-Q1 DCK Package:
5-Pin SC70(1)
Top View
Table 4-1 Pin Functions: TLV9041-Q1
PIN I/O DESCRIPTION
NAME SOT-23 SC70
IN– 4 3 I Inverting input
IN+ 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 I or — Negative (low) supply or ground (for single-supply operation)
V+ 5 5 I Positive (high) supply
(1) The TLV9041-Q1 packages are preview only.
TLV9044-Q1 TLV9042-Q1 D, PW, and DGK Packages:8-Pin SOIC, TSSOP, and VSSOP#GUID-8F439702-DE75-4AC5-A9E5-33DC7A12A25F/GUID-970F9456-883B-43AC-9F4E-3F44486FA997Top ViewFigure 4-3 TLV9042-Q1 D, PW, and DGK Packages:
8-Pin SOIC, TSSOP, and VSSOP(1)
Top View
Table 4-2 Pin Functions: TLV9042-Q1
PINI/ODESCRIPTION
NAMENO.
IN1–2IInverting input, channel 1
IN1+3INoninverting input, channel 1
IN2–6IInverting input, channel 2
IN2+5INoninverting input, channel 2
OUT11OOutput, channel 1
OUT27OOutput, channel 2
V–4INegative (low) supply or ground (for single-supply operation)
V+8IPositive (high) supply
(1) The TLV9042-Q1 packages are preview only.
TLV9044-Q1 TLV9044-Q1 D, PW and DYY Packages:14-Pin SOIC, TSSOP and SOT-23#GUID-8F439702-DE75-4AC5-A9E5-33DC7A12A25F/GUID-318CEC07-3C29-45FF-9522-80546C2411D9Top ViewFigure 4-4 TLV9044-Q1 D, PW and DYY Packages:
14-Pin SOIC, TSSOP and SOT-23(1)
Top View
Table 4-3 Pin Functions: TLV9044-Q1
PINI/ODESCRIPTION
NAMENO.
IN1–2IInverting input, channel 1
IN1+3INoninverting input, channel 1
IN2–6IInverting input, channel 2
IN2+5INoninverting input, channel 2
IN3–9IInverting input, channel 3
IN3+10INoninverting input, channel 3
IN4–13IInverting input, channel 4
IN4+12INoninverting input, channel 4
NC——No internal connection
OUT11OOutput, channel 1
OUT27OOutput, channel 2
OUT38OOutput, channel 3
OUT414OOutput, channel 4
V–11I or —Negative (low) supply or ground (for single-supply operation)
V+4IPositive (high) supply
(1) The D (SOIC) and DYY (SOT-23) packages are preview only.