SBOS839M March   2017  – December 2024 TLV9061 , TLV9062 , TLV9064

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information: TLV9061
    5. 5.5  Thermal Information: TLV9061S
    6. 5.6  Thermal Information: TLV9062
    7. 5.7  Thermal Information: TLV9062S
    8. 5.8  Thermal Information: TLV9064
    9. 5.9  Thermal Information: TLV9064S
    10. 5.10 Electrical Characteristics
    11. 5.11 Typical Characteristics
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Rail-to-Rail Input
      2. 6.3.2 Rail-to-Rail Output
      3. 6.3.3 EMI Rejection
      4. 6.3.4 Overload Recovery
      5. 6.3.5 Shutdown Function
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Low-Side Current Sense Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Curve
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Input and ESD Protection
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Thermal Information: TLV9062S

THERMAL METRIC(1) TLV9002S UNIT
YCK (DSBGA) RUG (X2QFN) DGS (VSSOP)
9 PINS 10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 129.8 197.2 170.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.9 93.3 84.9 °C/W
RθJB Junction-to-board thermal resistance 37.5 123.8 113.5 °C/W
ΨJT Junction-to-top characterization parameter 0.5 3.7 16.4 °C/W
ΨJB Junction-to-board characterization parameter 37.1 120.2 112.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.