SBOSA34E January   2021  – March 2024 TLV9351-Q1 , TLV9352-Q1 , TLV9354-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Protection Circuitry
      2. 6.3.2 EMI Rejection
      3. 6.3.3 Phase Reversal Protection
      4. 6.3.4 Thermal Protection
      5. 6.3.5 Capacitive Load and Stability
      6. 6.3.6 Common-Mode Voltage Range
      7. 6.3.7 Electrical Overstress
      8. 6.3.8 Overload Recovery
      9. 6.3.9 Typical Specifications and Distributions
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 High Voltage Precision Comparator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
        2. 8.1.1.2 TI Precision Designs
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Electrical Characteristics

For VS = (V+) – (V–) = 4.5 V to 40 V (±2.25 V to ±20 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and
VOUT = VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VCM = V– ±0.35 ±1.8 mV
TA = –40°C to 125°C ±2
dVOS/dT Input offset voltage drift TA = –40°C to 125°C ±1.5 µV/℃
PSRR Input offset voltage versus power supply VCM = V– TA = –40°C to 125°C ±2 ±5 μV/V
Channel separation f = 0 Hz 5 µV/V
INPUT BIAS CURRENT
IB Input bias current ±10 pA
IOS Input offset current ±10 pA
NOISE
EN Input voltage noise f = 0.1 Hz to 10 Hz   2 μVPP
  0.33   µVRMS
eN Input voltage noise density f = 1 kHz 15   nV/√Hz
f = 10 kHz   14  
iN Input current noise f = 1 kHz   2   fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) – 0.2 (V+) – 2 V
CMRR Common-mode rejection ratio VS = 40 V, (V–) – 0.1 V < VCM < (V+) – 2 V (Main input pair) TA = –40°C to 125°C 95 110 dB
VS = 4.5 V, (V–) – 0.1 V < VCM < (V+) – 2 V (Main input pair) 82 90
INPUT CAPACITANCE
ZID Differential 100 || 3 MΩ || pF
ZICM Common-mode 6 || 1 TΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 40 V, VCM = V–
(V–) + 0.1 V < VO < (V+) –  0.1 V		 120 130 dB
TA = –40°C to 125°C 127
FREQUENCY RESPONSE
GBW Gain-bandwidth product 3.5 MHz
SR Slew rate VS = 40 V, G = +1, CL = 20 pF 20 V/μs
tS Settling time To 0.01%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20 pF 5 μs
To 0.01%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20 pF 4
To 0.1%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20 pF 4
To 0.1%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20 pF 3
Phase margin G = +1, RL = 10 kΩ 60 °
Overload recovery time VIN  × gain > VS 600 ns
THD+N Total harmonic distortion + noise (1) VS = 40 V, VO = 1 VRMS, G = 1, f = 1 kHz 0.001%
OUTPUT
  Voltage output swing from rail Positive and negative rail headroom VS = 40 V, RL = no load(2)   5 10 mV
VS = 40 V, RL = 10 kΩ   50 55
VS = 40 V, RL = 2 kΩ   200 250
VS = 4.5 V, RL = no load(2)   1
VS = 4.5 V, RL = 10 kΩ   20 30
VS = 4.5 V, RL = 2 kΩ   40 75
ISC Short-circuit current ±60 mA
CLOAD Capacitive load drive 300
 pF
ZO Open-loop output impedance f = 1 MHz, IO = 0 A 600 Ω
POWER SUPPLY
IQ Quiescent current per amplifier VCM = V–, IO = 0 A 650 800 µA
TA = –40°C to 125°C 850
(1) Third-order filter; bandwidth = 80 kHz at –3 dB.
(2) Specified by characterization only.