SBOS716D
May 2015 – January 2020
TMP107
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Digital Temperature Output
7.3.2
Temperature Limits and Alert
7.3.2.1
ALERT1, ALERT2, R1, and R2 Pins
7.3.3
SMAART Wire™ Communication Interface
7.3.3.1
Communication Protocol
7.3.3.1.1
Calibration Phase
7.3.3.1.2
Command and Address Phase
7.3.3.1.2.1
Global or Individual (G/nI) Bit
7.3.3.1.2.2
Read/Write (R/nW) Bit
7.3.3.1.2.3
Command or Address (C/nA) Bit:
7.3.3.1.3
Register Pointer Phase
7.3.3.1.4
Data Phase
7.3.3.2
SMAART Wire™ Operations
7.3.3.2.1
Command Operations
7.3.3.2.1.1
Address Initialize
7.3.3.2.1.2
Last Device Poll
7.3.3.2.1.3
Global Software Reset
7.3.3.2.2
Address Operations
7.3.3.2.2.1
Individual Write
7.3.3.2.2.2
Individual Read
7.3.3.2.2.3
Global Write
7.3.3.2.2.4
Global Read
7.4
Device Functional Modes
7.4.1
Continuous-Conversion Mode
7.4.2
Shutdown Mode
7.4.3
One-Shot Mode
7.5
Programming
7.5.1
EEPROM
7.5.2
EEPROM Operations
7.5.2.1
EEPROM Unlock
7.5.2.2
EEPROM Lock
7.5.2.3
EEPROM Programming
7.5.2.4
EEPROM Acquire or Read
7.6
Register Map
7.6.1
Temperature Register (address = 0h) [reset = 0h]
Table 4.
Temperature Register Field Descriptions
7.6.2
Configuration Register (address = 1h) [reset = A000h]
Table 5.
Configuration Register Field Descriptions
7.6.3
High Limit 1 Register (address = 2h) [reset = 7FFCh]
Table 7.
High Limit 1 Register Field Descriptions
7.6.4
Low Limit 1 Register (address = 3h) [reset = 8000h]
Table 8.
Low Limit 1 Register Field Descriptions
7.6.5
High Limit 2 Register (address = 4h) [reset = 7FFCh]
Table 9.
High Limit 2 Register Field Descriptions
7.6.6
Low Limit 2 Register (address = 5h) [reset = 8000h]
Table 10.
Low Limit 2 Register Field Descriptions
7.6.7
EEPROM n Register (where n = 1 to 8) (addresses = 6h to Dh) [reset = 0h]
Table 11.
EEPROM Register bits
7.6.8
Die ID Register (address = Fh) [reset = 1107h]
Table 12.
Die ID Register Field Descriptions
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Connecting Multiple Devices
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Voltage Drop Effect
8.2.1.2.2
EEPROM Programming Current
8.2.1.2.3
Power Savings
8.2.1.2.4
Accuracy
8.2.1.2.5
Electromagnetic Interference (EMI)
8.2.1.3
Application Curves
8.2.2
Connecting ALERT1 and ALERT2 Pins
8.2.3
ALERT1 and ALERT2 Pins Used as General-Purpose Output (GPO)
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbos716d_oa
sbos716d_pm
Device Images
Typical Application
All figures shown as TMP107 represent TMP107-Q1 as well.