SBOS441I September   2009  – October 2019 TMP431 , TMP432

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Schematics
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Temperature Measurement Data
      2. 8.3.2 Beta Compensation
      3. 8.3.3 Series Resistance Cancellation
      4. 8.3.4 Differential Input Capacitance
      5. 8.3.5 Filtering
      6. 8.3.6 Sensor Fault
      7. 8.3.7 THERM and ALERT/THERM2
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode (SD)
      2. 8.4.2 One-Shot Mode
    5. 8.5 Programming
      1. 8.5.1  Serial Interface
      2. 8.5.2  Bus Overview
      3. 8.5.3  Timing Diagrams
      4. 8.5.4  Serial Bus Address
      5. 8.5.5  Read and Write Operations
      6. 8.5.6  Undervoltage Lockout
      7. 8.5.7  Timeout Function
      8. 8.5.8  High-Speed Mode
      9. 8.5.9  General Call Reset
      10. 8.5.10 SMBus Alert Function
    6. 8.6 Register Maps
      1. 8.6.1  Pointer Register
      2. 8.6.2  Temperature Registers
      3. 8.6.3  Limit Registers
      4. 8.6.4  Status Registers
        1. 8.6.4.1 TMP431 Status Register
        2. 8.6.4.2 TMP432 Status Register
      5. 8.6.5  Configuration Register 1
      6. 8.6.6  Configuration Register 2
      7. 8.6.7  Conversion Rate Register
      8. 8.6.8  Beta Compensation Configuration Register
      9. 8.6.9  η-Factor Correction Register
      10. 8.6.10 Software Reset
      11. 8.6.11 Consecutive Alert Register
      12. 8.6.12 Therm Hysteresis Register
      13. 8.6.13 Identification Registers
      14. 8.6.14 Open Status Register
      15. 8.6.15 Channel Mask Register
      16. 8.6.16 High Limit Status Register
      17. 8.6.17 Low Limit Status Register
      18. 8.6.18 THERM Limit Status Register
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Read and Write Operations

Accessing a particular register on the TMP43x is accomplished by writing the appropriate value to the Pointer Register. The value for the Pointer Register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP43x require a value for the Pointer Register (see Figure 14).

When reading from the TMP43x, the last value stored in the Pointer Register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the Pointer Register. This transaction is accomplished by issuing a slave address byte with the R/W bit low, followed by the Pointer Register byte. No additional data are required. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. See Figure 15 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the Pointer Register bytes, because the TMP43x retain the Pointer Register value until it is changed by the next write operation. Note that register bytes are sent MSB first, followed by the LSB.