SCDS463A June   2022  – March 2023 TMUX4051-Q1 , TMUX4052-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information: TMUX4051-Q1
    4. 7.4 Thermal Information: TMUX4052-Q1
    5. 7.5 Recommended Operating Conditions
    6. 7.6 Electrical Characteristics
    7. 7.7 AC Performance Characteristics
    8. 7.8 Timing Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Transition Time
    5. 8.5  Break-Before-Make
    6. 8.6  tON(EN) and tOFF(EN)
    7. 8.7  Propagation Delay
    8. 8.8  Charge Injection
    9. 8.9  Off Isolation
    10. 8.10 Crosstalk
    11. 8.11 Bandwidth
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Device Functional Modes
      5. 9.3.5 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
    3. 10.3 Design Requirements
    4. 10.4 Detailed Design Procedure
    5. 10.5 Application Curves
    6. 10.6 Power Supply Recommendations
    7. 10.7 Layout
      1. 10.7.1 Layout Guidelines
      2. 10.7.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • PW|16
  • DYY|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.4 Device Functional Modes

When the EN pin of the TMUX405x-Q1 devices is pulled low, one of the switches is closed based on the state of the address or select pins. When the EN pin is pulled high, all the switches are in an open state regardless of the state of the address or select pins.

Unused logic control pins must be tied to GND or VDD to be certain that the device does not consume additional current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (Sx and Dx) should be connected to GND.