SCDS404B March   2021  – November 2022 TMUX7411F , TMUX7412F , TMUX7413F

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Electrical Characteristics: Global
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics
    7. 7.7  ±20 V Dual Supply: Electrical Characteristics
    8. 7.8  12 V Single Supply: Electrical Characteristics
    9. 7.9  36 V Single Supply: Electrical Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Turn-On and Turn-Off Time
    3. 8.3  Off-Leakage Current
    4. 8.4  On-Leakage Current
    5. 8.5  Input and Output Leakage Current Under Overvoltage Fault
    6. 8.6  Fault Response Time
    7. 8.7  Fault Recovery Time
    8. 8.8  Fault Flag Response Time
    9. 8.9  Fault Flag Recovery Time
    10. 8.10 Charge Injection
    11. 8.11 Off Isolation
    12. 8.12 Inter-Channel Crosstalk
    13. 8.13 Bandwidth
    14. 8.14 THD + Noise
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Flat ON-Resistance
      2. 9.3.2 Protection Features
        1. 9.3.2.1 Input Voltage Tolerance
        2. 9.3.2.2 Powered-Off Protection
        3. 9.3.2.3 Fail-Safe Logic
        4. 9.3.2.4 Overvoltage Protection and Detection
        5. 9.3.2.5 ESD Protection
        6. 9.3.2.6 Latch-Up Immunity
        7. 9.3.2.7 EMC Protection
      3. 9.3.3 Overvoltage Fault Flags
      4. 9.3.4 Bidirectional Operation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Fault Mode
      3. 9.4.3 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.8 Fault Flag Response Time

Fault flag response time (tRESPONSE(FLAG)) measures the delay between the source voltage exceeding the fault supply voltage (VDD or VSS) by 0.5 V and the general fault flag (FF) pin to go below 10% of its original value. Figure 8-9 shows the setup used to measure tRESPONSE(FLAG).

Figure 8-9 Fault Flag Response Time Measurement Setup