SLVS796I
September 2008 – March 2016
TPD2E007
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings: Surge Protection
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
IEC 61000-4-2 Level 4 ESD Protection
7.3.2
IEC 61000-4-5 Surge Protection
7.3.3
IO Capacitance
7.3.4
Low 50-nA Leakage Current
7.3.5
Space-Saving PicoStar and SOT Package
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Signal Range on IO1 and IO2 Pins
8.2.2.2
Surge Withstand
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Community Resources
11.2
Trademarks
11.3
Electrostatic Discharge Caution
11.4
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|3
MPDS295G
YFM|4
MXLG001J
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvs796i_oa
slvs796i_pm
9 Power Supply Recommendations
This device is a passive ESD device so there is no need to power it. Take care not to violate the recommended I/O specification (±13 V) to ensure the device functions properly.