SLLS949C September   2009  – January 2023 TPD2S017

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dissipation Ratings
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPD2S017 is a two channel electrostatic discharge (ESD) protection device. This protection product offers two-stage ESD transient voltage suppression (TVS) diodes in each line with a typically 1-Ω series resistor isolation. This architecture allows the device to clamp at a very low voltage during system level ESD strikes.

The TPD2S017 conforms to the IEC61000-4-2 ESD protection standard. Due to the series resistor component, the TPD2S017 provides a controlled filter roll-off for even greater spurious EMI suppression and signal integrity. The monolithic silicon technology allows good matching of the component values, including the clamp capacitances and the series resistors between the differential signal pairs. The tight matching of the line capacitance and series resistors ensures that the differential signal distortion due to added ESD clamp remains minimal, and it also allows the part to operate at high-speed differential data rate (in excess of 1.5 Gbps). The DBV package offers a flow-through pin mapping for ease of board layout.

Typical applications of this ESD protection device are circuit protection for USB data lines, IEEE 1394 Interfaces, LVDS, MDDI/MIPI and HS signals.

Package Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPD2S017 DBV (SOT-23, 6) 2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-60FA3F01-7E98-4B5D-A2C3-E1F9B499A7D3-low.gif Application Schematic