Refer to the PDF data sheet for device specific package drawings
The TPD3E001 is a three-channel Transient Voltage Suppressor (TVS) based Electrostatic Discharge (ESD) protection diode array. The TPD3E001 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). This device has a 1.5-pF IO capacitance per channel, making it ideal for use in high-speed data IO interfaces. The ultra low leakage current
(<1 nA max) is suitable for precision analog measurements in applications like glucose meters and heart rate monitors.
The TPD3E001 is available in space saving DRY (USON), DRL (SOT), and DRS (WSON) packages and is specified for –40°C to 85°C operation. Also see TPD2E2U06, TPD4E1U06, and TPD6E001 which are 2, 4, and 6 channel ESD protection options, respectively, for ESD protection diode arrays with a different number of channels. The TPD2E2U06 provides a higher level of IEC ESD protection, when compared to the TPDxE001 family, and removes the need for an input capacitor. The TPD4E1U06 removes the need for an input capacitor, provides higher IEC ESD protection, and provides lower capacitance, when compared to the TPDxE001 family.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPD3E001 | SOT (5) | 1.60 mm × 1.20 mm |
WSON (6) | 3.00 mm × 3.00 mm | |
USON (6) | 1.45 mm × 1.00 mm |
Changes from E Revision (April 2013) to F Revision
PIN | TYPE | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | DRY NO. | DRL NO. | DRS NO. | ||
IOx | 1, 2, 4 | 1, 2, 4 | 1, 2, 4 | I/O | ESD-protected channel |
GND | 3 | 3 | 3 | GND | Ground |
VCC | 6 | 5 | 6 | Power | Power-supply input. Bypass VCC to GND with a 0.1-μF ceramic capacitor. |
N.C. | 5 | – | 5 | – | No connection. Not internally connected. |
EP | – | – | Exposed Thermal Pad | GND | Exposed thermal pad. Connect to GND or leave floating. |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | –0.3 | 7 | V | ||
VI/O | IO voltage tolerance | –0.3 | VCC + 0.3 | V | |
TJ | Junction temperature | 150 | °C | ||
Lead temperature (soldering, 10 s) | 300 | °C | |||
Peak pulse power (tp = 8/20 µs) | 90 | W | |||
Peak pulse power (tp = 8/20 µs) | 5.5 | A | |||
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±15000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 | |||
IEC 61000-4-2 Contact Discharge | ±8000 | |||
IEC 61000-4-2 Air-gap Discharge | ±15000 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Operating Voltage | VCC Pin | 0.9 | 5.5 | V | |
IOx Pin | 0 | VCC | |||
Operating free-air temperature, TA | -40 | 85 | °C |
THERMAL METRIC(1) | TPD3E001 | UNIT | |||
---|---|---|---|---|---|
DRL (SOT) | DRS (WSON) | DRY (USON) | |||
5 PINS | 6 PINS | 6 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 266.3 | 91.9 | 374.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 111.5 | 106.9 | 223.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 84.5 | 64.8 | 227.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 16.0 | 10.2 | 52.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 84.0 | 64.9 | 224.8 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 29.9 | 87.5 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VCC | Supply voltage | 0.9 | 5.5 | V | |||
ICC | Supply current | 1 | 100 | nA | |||
VF | Diode forward voltage | IF = 10 mA | 0.65 | 0.95 | V | ||
VBR | Breakdown Voltage | IBR = 10mA | 11 | V | |||
VC | Channel clamp voltage(2) | TA = 25°C, ±15-kV HBM, IF = 10 A |
Positive transients | VCC + 25 | V | ||
Negative transients | –25 | ||||||
TA = 25°C, ±8-kV Contact Discharge (IEC 61000-4-2), IF = 24 A |
Positive transients | VCC + 60 | |||||
Negative transients | –60 | ||||||
TA = 25°C, ±15-kV Air-Gap Discharge (IEC 61000-4-2), IF = 45 A |
Positive transients | VCC + 100 | |||||
Negative transients | –100 | ||||||
Ii/o | Channel leakage current | Vi/o = GND or VCC | ±1 | nA | |||
Cio | Channel input capacitance | VCC = 5 V, bias of VCC/2 | 1.5 | pF | |||
Rdyn | Dynamic resistance | Ii/o = 1 A, between IO pin and ground | 1.2 | Ω |
VCC = 5.0 V |
VCC = 5.5 V |