SLUSF08 March   2024 TPS1213-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge Pump and Gate Driver Output (VS, G1PU, G1PD, BST, SRC)
      2. 7.3.2 Capacitive Load Driving
        1. 7.3.2.1 Using Low Power Bypass FET (G2 drive) for Load Capacitor Charging
        2. 7.3.2.2 Using Main FET's (G1 drive) Gate Slew Rate Control
      3. 7.3.3 Short-Circuit Protection
        1. 7.3.3.1 Short-Circuit Protection With Auto-Retry
        2. 7.3.3.2 Short-Circuit Protection With Latch-Off
      4. 7.3.4 Device Functional Modes
        1. 7.3.4.1 State Diagram
        2. 7.3.4.2 State Transition Timing Diagram
        3. 7.3.4.3 Power Down
        4. 7.3.4.4 Shutdown Mode
        5. 7.3.4.5 Low Power Mode
        6. 7.3.4.6 Active Mode
      5. 7.3.5 Undervoltage Protection (UVLO)
      6. 7.3.6 Reverse Polarity Protection
      7. 7.3.7 Short-Circuit Protection Diagnosis (SCP_TEST)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Application Limitations
        1. 8.1.1.1 Short-Circuit Protection Delay
        2. 8.1.1.2 Short-Circuit Protection and Load wakeup Threshold
    2. 8.2 Typical Application 1: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application 2: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup and Output Bulk Capacitor Charging
      1. 8.3.1 Design Requirements
      2. 8.3.2 External Component Selection
      3. 8.3.3 Application Curves
    4. 8.4 TIDA-020065: Automotive Smart Fuse Reference Design driving Power at all times (PAAT) Loads With Automatic Load Wakeup, Output Bulk Capacitor Charging, Bi-directional Current Sensing and Software I2t
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGX|19
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2.1 Using Low Power Bypass FET (G2 drive) for Load Capacitor Charging

In high-current applications where several FETs (Q1, Q2) are connected in parallel, the gate slew rate control for bypass FET (Q3) can be used to precharge the capacitive load with inrush current limiting.

The TPS12130-Q1 integrates gate driver (G2) with a dedicated control input (LPM). This feature can be used to drive a separate low power bypass FET (Q3) and precharge the capacitive load with inrush current limiting. Figure 7-3 shows the low power bypass FET implementation for capacitive load charging using TPS12130-Q1. An external capacitor Cg reduces the gate turn-ON slew rate and controls the inrush current.

GUID-20230202-SS0I-N2S9-G4JH-XKJDR8BFVFCW-low.svgFigure 7-3 Capacitor Charging Using Gate Slew Rate Control of Low Power Bypass FET

During power up with EN/UVLO pulled high and LPM pulled low > 500µs time, the device turns ON Q3 by pulling G2 high with 165µA of source current and the main FETs (G1 gate drive) are kept OFF.

Use Equation 24 to calculate the IINRUSH:

Equation 2. IINRUSH= CLOAD× VBATTTcharge

Where,

CLOAD is the load capacitance.

VBATT is the input voltage and Tcharge is the charge time.

Use Equation 25 to calculate the required Cg value.

Equation 3. Cg = CLOAD × I(G)IINRUSH

Where,

I(G) is 165µA (typical),

A series resistor Rg must be used in conjunction with Cg to limit the discharge current from Cg during turn-off. The recommended value for Rg is between 220Ω to 470Ω.

After the output capacitor is charged, main FETs can be controlled (G1 gate drive) and bypass FET (G2 gate drive) can be turned OFF by driving LPM high externally. The main FETs (G1 gate drive) can now be turned ON by driving INP high.

Figure 7-4 shows application circuit to charge large output capacitors using low power bypass path in high current applications. This design involves a power resistor (RBYPASS) in series with bypass FET as shown in Figure 7-4.

GUID-20230202-SS0I-ZDPV-GKDN-TB7J3XNC2V0S-low.svgFigure 7-4 TPS12130-Q1 Application Circuit for Capacitive Load Driving Using Low Power Bypass FET and Series Power Resistor (RBYPASS)

Using Bypass Path for Load Capacitor Charging and Automatic Load Wakeup

TPS12130-Q1 supports load capacitor charging and automatic load wakeup functionality using a common bypass path. Use a resistor RBYPASS and a FET Q3 as shown in Figure 7-4.

During the load capacitor charging, the device senses VGS of the bypass FET Q3 by monitoring the voltage across G2 and SRC. Once the sensed threshold has reached VG2_GOOD threshold (7V typical) indicating the Q3 gate is enhanced (and load capacitor is charged) then the voltage across CS+ and CS– pins is monitored.

With this scheme, capacitor charging current (IINRUSH) can also be set at higher than load wakeup threshold (ILWU) as shown in Figure 7-5.

GUID-20230403-SS0I-S5TF-R7PV-NQMVTGK4NQQD-low.svgFigure 7-5 Timing Diagram for Output Bulk Capacitor Charging Using Bypass Path

Setting the load wakeup trigger threshold: During normal operation, the series power resistor RBYPASS along with bypass FET RDSON is used to set load wakeup current threshold. RBYPASS can be selected using the following equation:

Equation 4. RBYPASS (Ω)= 2 μA × RISCP +10 mVILWU - RDSON_BYPASS

Refer to Equation 13 in Section 8.1.1.2 for update in equation for final revision of IC.

Where,

RISCP is the resistor selected based on set short-circuit threshold using Equation 8.

ILWU is the desired load current wakeup threshold.

RDSON_BYPASS is the RDSON of bypass FET.

RBYPASS also helps to limit the current as well as stress on Q3 during power up into short-circuit.