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  • TPS20xxC and TPS20xxC-2 Current Limited, Power-Distribution Switches

    • SLVSAU6H June   2011  – April 2016 TPS2000C , TPS2001C , TPS2041C , TPS2051C , TPS2061C , TPS2065C , TPS2065C-2 , TPS2068C , TPS2069C , TPS2069C-2

      PRODUCTION DATA.  

  • CONTENTS
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  • TPS20xxC and TPS20xxC-2 Current Limited, Power-Distribution Switches
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: SOT-23
    5. 7.5 Thermal Information: MSOP-PowerPAD
    6. 7.6 Electrical Characteristics: TJ = TA = 25°C
    7. 7.7 Electrical Characteristics: -40°C ≤ TJ ≤ 125°C
    8. 7.8 Timing Requirements: TJ = TA = 25°C
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Enable
      3. 8.3.3 Internal Charge Pump
      4. 8.3.4 Current Limit
      5. 8.3.5 FLT
      6. 8.3.6 Output Discharge
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input and Output Capacitance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation and Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • DGN|8
    • MPDS046G
  • DBV|5
    • MPDS018T
Thermal pad, mechanical data (Package|Pins)
  • DGN|8
    • PPTD229A
Orderable Information
  • slvsau6h_oa
  • slvsau6h_pm
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

DATA SHEET

TPS20xxC and TPS20xxC-2 Current Limited, Power-Distribution Switches

1 Features

  • Single Power Switch Family
  • Pin-for-Pin With Existing TI Switch Portfolio
  • Rated Currents of 0.5 A, 1 A, 1.5 A, 2 A
  • ±20% Accurate, Fixed, Constant Current Limit
  • Fast Overcurrent Response: 2 µs
  • Deglitched Fault Reporting
  • Selected Parts With (TPS20xxC) and Without (TPS20xxC-2) Output Discharge
  • Reverse Current Blocking
  • Built-In Soft Start
  • Ambient Temperature Range: –40°C to 85°C
  • UL Listed and CB-File No. E169910

2 Applications

  • USB Ports and Hubs, Laptops, and Desktops
  • High-Definition Digital TVs
  • Set-Top Boxes
  • Short-Circuit Protection

3 Description

The TPS20xxC and TPS20xxC-2 power-distribution switch family is intended for applications, such as USB, where heavy capacitive loads and short circuits are likely to be encountered. This family offers multiple devices with fixed current-limit thresholds for applications from 0.5 A to 2 A.

The TPS20xxC and TPS20xxC-2 family limits the output current to a safe level by operating in a constant-current mode when the output load exceeds the current limit threshold. This provides a predictable fault current under all conditions. The fast overload response time eases the burden on the main 5-V supply to provide regulated power when the output is shorted. The power-switch rise and fall times are controlled to minimize current surges during turnon and turnoff.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS20xxC,
TPS20xxC-2		 SOT-23 (5) 2.90 mm × 1.60 mm
VSSOP (8) 3.00 mm × 3.00 mm
MSOP-PowerPAD (8) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Diagram

TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 typ_app_lvsau6.gif

4 Revision History

Changes from G Revision (July 2013) to H Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Deleted Devices table (previously Table 1) Go

Changes from F Revision (August 2012) to G Revision

  • Deleted (See Table 1) from Feature: UL Listed and CB-File No. E169910Go
  • Changed From: PXKI To: PYKI in the DEVICE INFORMATION table SOT23-5 (DBV) column (TPS2069C)Go
  • Deleted Note 2 from : "UL listed and CB complete"Go

Changes from E Revision (April 2012) to F Revision

  • Added device TPS20xxC-2 Go
  • Changed Feature From: Ouput Discharge When TPS20XXC is Disabled To: Selected parts with (TPS20xxC) and without (TPS20xxC-2) Output DischargeGo
  • Added devices TPS2041C, TPS2061C, TPS2065C-2, TPS2068C, and TPS2069C-2 to the Device Information tableGo
  • Added the TPS2069C-2 DeviceGo
  • Added PXKI in the DEVICE INFORMATION table SOT23-5 (DBV) column (TPS2069C)Go
  • Added devices TPS2041C, TPS2061C, TPS2065C-2, TPS2068C, and TPS2069C-2 to and removed Product PreviewGo
  • Added Note 1 to the RECOMMENDED OPERATING CONDITIONS tableGo
  • Added TPS2041C, TPS2061C, TPS2068C, TPS2065C-2 and TPS2069C-2 devices to IOUT in the RECOMMENDED OPERATING CONDITIONS tableGo
  • Added the DBV option to Power Switch RDS(on) 1.5 A rated output, 25°C mΩGo
  • Added the DBV option to Power Switch RDS(on) 1.5 A rated output Go
  • Changed ISO Current Limit Go
  • Added Leakage CurrentGo
  • Added the DBV option to Power Switch RDS(on) 1.5 A rated output . Go
  • Changed ISO Current Limit Go
  • Added Leakage CurrentGo
  • Changed the second para graph of the ENABLE sectionGo
  • Added sentence to end of paragraph in the OUTPUT DISCHARGE sectionGo

Changes from D Revision (February 2012) to E Revision

  • Changed the POWER DISSIPATION AND JUNCTION TEMPERATURE section. Replaced paragraph " While it is recommended..."Go

Changes from C Revision (October 2011) to D Revision

  • Added Feature UL Listed and CB-File No. E169910 (See )Go
  • Added table Note 2, UL listed and CB complete.Go
  • Added VIH and VIL information to the ROC TableGo

Changes from B Revision (September 2011) to C Revision

  • Changed From: PXF1 To: PXFI and From: PSG1 To: PXGI in the DEVICE INFORMATION table MOSP-8 (DGK) columnGo
  • Changed TPS2000C (MSOP-8) status From: Preview To: Active in Table 1Go
  • Changed the θJACustom 2 A Rated DGK value from N/A to 110.3Go
  • Added Figure 45 - DGK Package PCB Layout ExampleGo

Changes from A Revision (July 2011) to B Revision

  • Added the DGK Package Information throughout the data sheetGo
  • Changed title of Figure 30 From: NEW FIG To: TPS2065C 50 Ω Short CircuitGo

Changes from * Revision (June 2011) to A Revision

  • Changed the TPS2051C, TPS2065C, and TPS2069C Devices Status From: Preview To: ActiveGo
  • Corrected pinout numbers for the 5-PIN PACKAGE Go

5 Device Comparison Table

MAXIMUM OPERATING
CURRENT		 OUTPUT DISCHARGE ENABLE BASE PART NUMBER PACKAGED DEVICE AND MARKING(1)
MSOP-8 (DGN)
PowerPAD™		 SOT23-5
(DBV)		 VSSOP-8
(DGK)
0.5 Y Low TPS2041C —(2) PYJI —
0.5 Y High TPS2051C — VBYQ —
1 Y Low TPS2061C PXMI PXLI —
1 Y High TPS2065C VCAQ VCAQ —
1 N High TPS2065C-2 PYRI PYQI —
1.5 Y Low TPS2068C PXNI — —
1.5 Y High TPS2069C VBUQ PYKI —
1.5 N High TPS2069C-2 PYSI — —
2 Y Low TPS2000C BCMS — PXFI
2 Y High TPS2001C VBWQ – PXGI
(1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
(2) "–" indicates the device is not available in this package.

6 Pin Configuration and Functions

DGN Package
8-Pin MSOP-PowerPAD
Top View
DGK Package
8-Pin VSSOP
Top View

Pin Functions - 8 Pins

PIN I/O DESCRIPTION
NAME NO.
EN/EN 4 I Enable input, logic high turns on power switch
FLT 5 O Active-low open-drain output, asserted during overcurrent, or overtemperature conditions
GND 1 — Ground connection
IN 2, 3 PWR Input voltage and power-switch drain; connect a 0.1-µF or greater ceramic capacitor from IN to GND close to the IC
OUT 6, 7, 8 PWR Power-switch output, connect to load
PowerPAD (DGN Only) PowerPAD — Internally connected to GND. Connect PAD to GND plane as a heatsink for the best thermal performance. PAD may be left floating if desired. See Power Dissipation and Junction Temperature for guidance.
DBV Package
5-Pin SOT-23
Top View

Pin Functions - 5 Pins

PIN I/O DESCRIPTION
NAME NO.
EN/EN 4 I Enable input, logic high turns on power switch
FLT 3 O Active-low open-drain output, asserted during overcurrent, or overtemperature conditions
GND 2 — Ground connection
IN 5 PWR Input voltage and power-switch drain; connect a 0.1-µF or greater ceramic capacitor from IN to GND close to the IC
OUT 1 PWR Power-switch output, connect to load.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Voltage on IN, OUT, EN or EN, FLT (4) –0.3 6 V
Voltage from IN to OUT –6 6 V
Maximum junction temperature, TJ Internally Limited
Storage temperature, Tstg –60 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Absolute maximum ratings apply over recommended junction temperature range.
(3) Voltages are with respect to GND unless otherwise noted.
(4) See Input and Output Capacitance.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
IEC 61000-4-2 contact discharge ±8000
IEC 61000-4-2 air-gap discharge(3) ±15000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) VOUT was surged on a PCB with input and output bypassing per the Typical Application Diagram on the first page (except input capacitor was 22 µF) with no device failures.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VIN Input voltage, IN 4.5 5.5 V
VEN Input voltage, EN or EN 0 5.5 V
VIH High-level input voltage, EN or EN 2 V
VIL Low-level input voltage, EN or EN 0.7 V
IOUT Continuous output current, OUT(1) TPS2041C and TPS2051C 0.5 A
TPS2061C, TPS2065C and TPS2065C-2 1
TPS2068C, TPS2069C and TPS2069C-2 1.5
TPS2000C and TPS2001C 2
TJ Operating junction temperature –40 125 °C
IFLT Sink current into FLT 0 5 mA
(1) Some package and current rating may request an ambient temperature derating of 85°C.

7.4 Thermal Information: SOT-23

THERMAL METRIC(1) TPS20xxC, TPS20xxC-2 UNIT
DBV (SOT-23)(2) DBV (SOT-23)(3)
5 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 224.9 220.4 °C/W
RθJCtop Junction-to-case (top) thermal resistance 95.2 89.7 °C/W
RθJB Junction-to-board thermal resistance 51.4 46.9 °C/W
ψJT Junction-to-top characterization parameter 6.6 5.2 °C/W
ψJB Junction-to-board characterization parameter 50.3 46.2 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance — — °C/W
RθJACustom See Power DIssipation and Junction Temperature 139.3 134.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Rated at 0.5 A or 1 A.
(3) Rated at 1.5 A or 2 A.

7.5 Thermal Information: MSOP-PowerPAD

THERMAL METRIC(1) TPS20xxC, TPS20xxC-2 UNIT
DGN
(MSOP-PowerPAD)(2)		 DGN
(MSOP-PowerPAD)(3)		 DGK
(VSSOP)(4)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 72.1 67.1 205.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 87.3 80.8 94.3 °C/W
RθJB Junction-to-board thermal resistance 42.2 37.2 126.9 °C/W
ψJT Junction-to-top characterization parameter 7.3 5.6 24.7 °C/W
ψJB Junction-to-board characterization parameter 42 36.9 125.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 39.2 32.1 — °C/W
RθJACustom See Power DIssipation and Junction Temperature 66.5 61.3 110.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Rated at 0.5 A or 1 A.
(3) Rated at 1.5 A or 2 A.
(4) Rated at 2 A.

7.6 Electrical Characteristics: TJ = TA = 25°C

Unless otherwise noted: VIN = 5 V, VEN = VIN or VEN = GND, IOUT = 0 A. See Device Comparison Table for the rated current of each part number. Parametrics over a wider operational range are shown in Electrical Characteristics: –40°C ≤ TJ ≤ 125°C(1).
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
POWER SWITCH
RDS(on) Input – output resistance 0.5-A rated output, 25°C DBV 97 110 mΩ
0.5-A rated output,
–40°C ≤ (TJ , TA) ≤ 85°C		 DBV 96 130 mΩ
1-A rated output, 25°C DBV 96 110 mΩ
DGN 86 100
1-A rated output,
–40°C ≤ (TJ , TA) ≤ 85°C		 DBV 96 130 mΩ
DGN 86 120
1.5-A rated output, 25°C DBV 76 91 mΩ
DGN 69 84 mΩ
1.5-A rated output,
–40°C ≤ (TJ , TA) ≤ 85°C 		DBV 76 106 mΩ
DGN 69 98 mΩ
2-A rated output, 25°C DGN, DGK 72 84 mΩ
2-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DGN, DGK 72 98 mΩ
CURRENT LIMIT
IOS(3) Current limit,
See Figure 6		 0.5-A rated output TPS20xxC 0.67 0.85 1.01 A
1-A rated output TPS20xxC 1.3 1.55 1.8
TPS20xxC-2 1.18 1.53 1.88
1.5-A rated output TPS20xxC 1.7 2.15 2.5
TPS20xxC-2 1.71 2.23 2.75
2-A rated output TPS20xxC 2.35 2.9 3.4
SUPPLY CURRENT
ISD Supply current, switch disabled IOUT = 0 A 0.01 1 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V, IOUT = 0 A 2
ISE Supply current, switch enabled IOUT = 0 A 60 70 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V, IOUT = 0 A 85
Ilkg Leakage current VOUT = 0 V, VIN = 5 V, disabled, measure IVIN TPS20xxC-2 0.05 1 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 0 V,
VIN = 5 V, disabled, measure IVIN		 2
IREV Reverse leakage current VOUT = 5 V, VIN = 0 V, measure IVOUT 0.1 1 µA
–40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 5 V, VIN = 0 V, measure IVOUT 5
OUTPUT DISCHARGE
RPD Output pulldown resistance(2) VIN = VOUT = 5 V, disabled TPS20xxC 400 470 600 Ω
(1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature
(2) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
(3) See Current Limit section for explanation of this parameter.

7.7 Electrical Characteristics: –40°C ≤ TJ ≤ 125°C

Unless otherwise noted:4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN or VEN = GND, IOUT = 0 A, typical values are at 5 V and 25°C. See Device Comparison Table for the rated current of each part number.
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
POWER SWITCH
RDS(ON) Input – output resistance 0.5-A rated output DBV 97 154 mΩ
1-A rated output DBV 96 154 mΩ
DGN 86 140
1.5-A rated output DBV 76 121 mΩ
DGN 69 112 mΩ
2-A rated output DGN, DGK 72 112 mΩ
ENABLE INPUT (EN or EN)
Threshold Input rising 1 1.45 2 V
Hysteresis 0.07 0.13 0.2 V
Leakage current (VEN or VEN) = 0 V or 5.5 V –1 0 1 µA
CURRENT LIMIT
IOS(3) Current limit,
See Figure 23		 0.5-A rated output TPS20xxC 0.65 0.85 1.05 A
1-A rated output TPS20xxC 1.2 1.55 1.9
TPS20xxC-2 1.1 1.53 1.96
1.5-A rated output TPS20xxC 1.6 2.15 2.7
TPS20xxC-2 1.6 2.23 2.86
2-A rated output TPS20xxC 2.3 2.9 3.6
tIOS Short-circuit response time(2) VIN = 5 V (see Figure 6),
One-half full load → RSHORT = 50 mΩ,
Measure from application to when current falls below 120% of final value		 2 µs
SUPPLY CURRENT
ISD Supply current, switch disabled IOUT = 0 A 0.01 10 µA
ISE Supply current, switch enabled IOUT = 0 A 65 90 µA
Ilkg Leakage current VOUT = 0 V, VIN = 5 V, disabled,
measure IVIN 		TPS20XXC-2 0.05 µA
IREV Reverse leakage current VOUT = 5.5 V, VIN = 0 V, measure IVOUT 0.2 20 µA
UNDERVOLTAGE LOCKOUT
VUVLO Rising threshold VIN↑ 3.5 3.75 4 V
Hysteresis(2) VIN↓ 0.14 V
FLT
Output low voltage, FLT IFLT = 1 mA 0.2 V
OFF-state leakage VFLT = 5.5 V 1 µA
tFLT FLT deglitch FLT assertion or deassertion deglitch 6 9 12 ms
OUTPUT DISCHARGE
RPD Output pulldown resistance VIN = 4 V, VOUT = 5 V, disabled TPS20XXC 350 560 1200 Ω
VIN = 5 V, VOUT = 5 V, disabled TPS20XXC 300 470 800
THERMAL SHUTDOWN
Rising threshold (TJ) In current limit 135 °C
Not in current limit 155
Hysteresis (2) 20
(1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature
(2) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
(3) See Current Limit for explanation of this parameter.

7.8 Timing Requirements: TJ = TA = 25°C

MIN NOM MAX UNIT
ENABLE INPUT (EN or EN)
tON Turnon time VIN = 5 V, CL = 1 µF, RL = 100 Ω, EN ↑ or EN ↓.
See Figure 1, Figure 3, and Figure 4		 0.5-A and 1-A Rated 1 1.4 1.8 ms
1.5-A and 2-A Rated 1.2 1.7 2.2
tOFF Turnoff time VIN = 5 V, CL = 1 µF, RL = 100 Ω, EN ↓ or EN ↑.
See Figure 1, Figure 3, and Figure 4		 0.5-A and 1-A Rated 1.3 1.65 2 ms
1.5-A and 2-A Rated 1.7 2.1 2.5
tR Rise time, output CL = 1 µF, RL = 100 Ω, VIN = 5 V. See Figure 2 0.5-A and 1-A Rated 0.4 0.55 0.7 ms
1.5-A and 2-A Rated 0.5 0.7 1
tF Fall time, output CL = 1 µF, RL = 100 Ω, VIN = 5 V. See Figure 2 0.5-A and 1-A Rated 0.25 0.35 0.45 ms
1.-5A and 2-A Rated 0.3 0.43 0.55
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 tst_load_lvsau6.gif Figure 1. Output Rise and Fall Test Load
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 pwr_on_off_lvsau6.gif Figure 2. Power-On and Power-Off Timing
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 enable_t_hi_lvsau6.gif Figure 3. Enable Timing, Active High Enable
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 enable_t_low_lvsau6.gif Figure 4. Enable Timing, Active Low Enable
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 short_cir_lvsau6.gif Figure 5. Output Short-Circuit Parameters
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 cur_limit_lvsau6.gif Figure 6. Output Characteristic Showing Current Limit

7.9 Typical Characteristics

TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G019_Deglitch_vs_Temp.png
Figure 7. Deglitch Period (TFLT) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G021_Ios_vs_Tj.png
Figure 9. Short Circuit Current (IOS) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G023_Isd_vs_Tj.png
Figure 11. Disabled Supply Current (ISD) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G025_Irev_vs_Vout.png
Figure 13. Reverse Leakage Current (IREV) vs Output Voltage
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G027_Ise_vs_Vin.png
Figure 15. Enabled Supply Current (ISE) vs Input Voltage
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G029_tr_vs_Tj.png
Figure 17. Output Rise Time (TR) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G031_t_recovery_vs_Ipk.png
Figure 19. Recovery vs Current Peak
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G020_Idscg_vs_Vout.png
Figure 8. Output Discharge Current vs Output Voltage
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G022_Irev_vs_Tj.png
Figure 10. Reverse Leakage Current (IREV) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G024_Isd_vs_Vin.png
Figure 12. Disabled Supply Current (ISD) vs Input Voltage
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G026_Ise_vs_Tj.png
Figure 14. Enabled Supply Current (ISE) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G028_tf_vs_Tj.png
Figure 16. Output Fall Time (TF) vs Temperature
TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 G030_Rdson_vs_Tj.png
Figure 18. Input-Output Resistance (RDS(ON)) vs Temperature

 
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