SLVSCH2 July   2014 TPS2105-EP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1. 5.1 Function Table
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Switches
        1. 7.3.1.1 N-Channel MOSFET
        2. 7.3.1.2 P-Channel MOSFET
        3. 7.3.1.3 Charge Pump
        4. 7.3.1.4 Driver
        5. 7.3.1.5 Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With EN Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step-by-Step Design Procedure
        2. 8.2.2.2 Power-Supply Considerations
        3. 8.2.2.3 Switch Transition
        4. 8.2.2.4 Thermal Protection
        5. 8.2.2.5 Undervoltage Lockout
        6. 8.2.2.6 Power Dissipation and Junction Temperature
        7. 8.2.2.7 ESD Protection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

5-Pin SOT
DBV Package
(Top View)
typapp_DBV_pkg_slvsch2.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
EN 1 I Active-high enable for IN1-OUT switch
GND 2 I Ground
IN1(1) 5 I Main input voltage, NMOS drain (250 mΩ), requires 0.22-µF bypass
IN2(1) 3 I Auxiliary input voltage, PMOS drain (1.3 Ω), requires 0.22-µF bypass
OUT 4 O Power switch output
(1) Unused INx should not be grounded.

5.1 Function Table

TPS2105
VIN1 VIN2 EN OUT
0 V 0 V XX(1) GND
0 V 5 V h GND
5 V 0 V h VIN1
5 V 5 V h VIN1
0 V 5 V l VIN2
5 V 0 V l VIN2
5 V 5 V l VIN2
(1) XX = Don't care