SLVSCH2 July   2014 TPS2105-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. 5.1 Function Table
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Switches
        1. 7.3.1.1 N-Channel MOSFET
        2. 7.3.1.2 P-Channel MOSFET
        3. 7.3.1.3 Charge Pump
        4. 7.3.1.4 Driver
        5. 7.3.1.5 Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With EN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step-by-Step Design Procedure
        2. 8.2.2.2 Power-Supply Considerations
        3. 8.2.2.3 Switch Transition
        4. 8.2.2.4 Thermal Protection
        5. 8.2.2.5 Undervoltage Lockout
        6. 8.2.2.6 Power Dissipation and Junction Temperature
        7. 8.2.2.7 ESD Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VI(IN1) Input voltage(2) –0.3 6 V
VI(IN2) Input voltage(2) –0.3 6 V
Input voltage, VI at EN(2) –0.3 6 V
VO Output voltage(2) –0.3 6 V
IO(IN1) Continuous output current 700 mA
IO(IN2) Continuous output current 140 mA
Continuous total power dissipation See Thermal Information
TJ Operating virtual junction temperature –55 150 °C
Lead temperature soldering 1.6 mm (1/16 inch) from case for 10 s 260 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.

6.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) –2000 2000 V
Machine model (MM) ESD stress voltage –200 200
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) –750 750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VI(INx) Input voltage 2.7 5.5 V
Input voltage, VI at EN 0 5.5 V
IO(IN1) Continuous output current 500 mA
IO(IN2) Continuous output current 100(1) mA
TJ Operating virtual junction temperature –55 125 °C
(1) The device can deliver up to 220 mA at IO(IN2). However, operation at the higher current levels results in greater voltage drop across the device, and greater voltage droop when switching between IN1 and IN2.

6.4 Thermal Information

THERMAL METRIC(1) TPS2105-EP UNIT
DBV (5 PINS)
RθJA Junction-to-ambient thermal resistance 208.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 122.9
RθJB Junction-to-board thermal resistance 36.7
ψJT Junction-to-top characterization parameter 14.2
ψJB Junction-to-board characterization parameter 35.8
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Over recommended operating range (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SWITCH
rDS(on) On-state resistance IN1-OUT, VI(IN1) = 5.5 V, VI(IN2) = 0 V 250 435 mΩ
IN2-OUT, VI(IN2) = 5.5 V, VI(IN1) = 0 V 1.3 2.4 Ω
ENABLE INPUT
VIH High-level input voltage 2.7 V ≤ VI(INx) ≤ 5.5 V 2 V
VIL Low-level input voltage 2.7 V ≤ VI(INx) ≤ 5.5 V 0.8 V
II Input current EN = 0 V or EN = VI(INx) –0.65 0.65 µA
SUPPLY CURRENT
II Supply current EN = L, IN2 selected 0.75 1.5 µA
EN = H, IN1 selected 18 35 µA

D013_SLVSCH2.gif
1. Wirebond life = Time at temperature with or without bias
2. Electromigration fail mode = Time at temperature with bias
3. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
4. The predicted operating lifetime versus junction temperature is based on reliability modeling and available qualification data.
Figure 1. Predicted Lifetime Derating Chart for TPS2105-EP

6.6 Switching Characteristics

TJ = 25°C, VI(IN1) = VI(IN2) = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr Output rise time IN1-OUT VI(IN2) = 0 CL = 1 µF, IL = 500 mA 340 µs
CL = 10 µF, IL = 500 mA 340
CL = 1 µF, IL = 100 mA 312
IN2-OUT VI(IN1) = 0 CL = 1 µF, IL = 100 mA 3.4
CL = 10 µF, IL = 100 mA 34
CL = 1 µF, IL = 10 mA 3.5
tf Output fall time IN1-OUT VI(IN2) = 0 CL = 1 µF, IL = 500 mA 6 µs
CL = 10 µF, IL = 500 mA 108
CL = 1 µF, IL = 100 mA 8
IN2-OUT VI(IN1) = 0 CL = 1 µF, IL = 100 mA 100
CL = 10 µF, IL = 100 mA 990
CL = 1 µF, IL = 10 mA 1000
tPLH Propagation delay time,
low-to-high output		 IN1-OUT VI(IN2) = 0 CL = 10 µF, IL = 100 mA 55 µs
IN2-OUT VI(IN1) = 0 1
tPHL Propagation delay time,
high-to-low output		 IN1-OUT VI(IN2) = 0 CL = 10 µF, IL = 100 mA 1.5 µs
IN2-OUT VI(IN1) = 0 50
td_test_waveforms_slvsch2.gifFigure 2. Test Circuit and Voltage Waveforms

6.7 Typical Characteristics

C001_SLVSCH2.png
VI(IN1) = 5 V VI(IN2) = 0 V TJ = 25°C
Figure 3. IN1 Switch Rise Time vs Output Current
C003_SLVSCH2.png
VI(IN1) = 5 V VI(IN2) = 0 V TJ = 25°C
Figure 5. IN1 Switch Fall Time vs Output Current
C005_SLVSCH2.png
VI(IN1) = 5 V VI(IN2) = 5 V TJ = 25°C
If switching from IN1 to IN2, the voltage droop is much smaller.
Thus, choose the load capacitance according to Figure 6.
Figure 7. Output Voltage Droop vs Output Current When Output is Switched from IN2 to IN1
D003_SLVSCH2.gif
Figure 9. IN1 Supply Current vs Junction Temperature
(IN1 Enabled)
D004_SLVSCH2.gif
Figure 11. IN2 Supply Current vs Junction Temperature (IN2 Enabled)
D008_SLVSCH2.gif
Figure 13. IN1-Out On-State Resistance vs Junction Temperature
C002_SLVSCH2.png
VI(IN1) = 0 V VI(IN2) = 5 V TJ = 25°C
Figure 4. IN2 Switch Rise Time vs Output Current
C004_SLVSCH2.png
VI(IN1) = 0 V VI(IN2) = 5 V TJ = 25°C
Figure 6. IN2 Switch Fall Time vs Output Current
C006_SLVSCH2.png
VI(IN1) = 5 V VI(IN2) = 0 V RL = 10 Ω
TJ = 25°C
Figure 8. Inrush Current vs Output Capacitance
D005_SLVSCH2.gif
Figure 10. IN1 Supply Current vs Junction Temperature
(IN1 Disabled)
D006_SLVSCH2.gif
Figure 12. IN2 Supply Current vs Junction Temperature (IN2 Disabled)
D007_SLVSCH2.gif
Figure 14. IN2-Out On-State Resistance vs Junction Temperature