SLVS933D July   2009  – December 2020 TPS23753A

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Product Information
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: Controller Section Only
    6. 7.6 Electrical Characteristics: PoE and Control
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Description
        1. 8.3.1.1  APD
        2. 8.3.1.2  BLNK
        3. 8.3.1.3  CLS
        4. 8.3.1.4  CS
        5. 8.3.1.5  CTL
        6. 8.3.1.6  DEN
        7. 8.3.1.7  FRS
        8. 8.3.1.8  GATE
        9. 8.3.1.9  RTN
        10. 8.3.1.10 VB
        11. 8.3.1.11 VC
        12. 8.3.1.12 VDD
        13. 8.3.1.13 VDD1
        14. 8.3.1.14 VSS
    4. 8.4 Device Functional Modes
      1. 8.4.1  Threshold Voltages
      2. 8.4.2  PoE Start-Up Sequence
      3. 8.4.3  Detection
      4. 8.4.4  Hardware Classification
      5. 8.4.5  Maintain Power Signature (MPS)
      6. 8.4.6  TPS23753A Operation
        1. 8.4.6.1 Start-Up and Converter Operation
        2. 8.4.6.2 PD Self-Protection
        3. 8.4.6.3 Converter Controller Features
      7. 8.4.7  Special Switching MOSFET Considerations
      8. 8.4.8  Thermal Considerations
      9. 8.4.9  FRS and Synchronization
      10. 8.4.10 Blanking – RBLNK
      11. 8.4.11 Current Slope Compensation
      12. 8.4.12 Adapter ORing
      13. 8.4.13 Protection
      14. 8.4.14 Frequency Dithering for Conducted Emissions Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Adapter ORing

Many PoE-capable devices are designed to operate from either a wall adapter or PoE power. A local power solution adds cost and complexity, but allows a product to be used if PoE is not available in a particular installation. While most applications only require that the PD operate when both sources are present, the TPS23753A supports forced operation from either of the power sources. Figure 8-9 illustrates three options for diode ORing external power into a PD. Only one option would be used in any particular design. Option 1 applies power to the TPS23753A PoE input, option 2 applies power between the TPS23753A PoE section and the power circuit, and option 3 applies power to the output side of the converter. Each of these options has advantages and disadvantages. A detailed discussion of the TPS23753A and ORing solutions is covered in application note Advanced Adapter ORing Solutions using the TPS23753, (SLVA306).

GUID-DD2E0CB0-5565-43A4-B2BB-DBF40A44D552-low.gifFigure 8-9 ORing Configurations

Preference of one power source presents a number of challenges. Combinations of adapter output voltage (nominal and tolerance), power insertion point, and which source is preferred determine solution complexity. Several factors contributing to the complexity are the natural high-voltage selection of diode ORing (the simplest method of combining sources), the current limit implicit in the PSE, PD inrush, and protection circuits (necessary for operation and reliability). Creating simple and seamless solutions is difficult if not impossible for many of the combinations. However, the TPS23753A offers several built-in features that simplify some combinations.

Several examples demonstrate the limitations inherent in ORing solutions. Diode ORing a 48-V adapter with PoE (option 1) presents the problem that either source might be higher. A blocking switch would be required to assure which source was active. A second example is combining a 12-V adapter with PoE using option 2. The converter draws approximately four times the current at 12 V from the adapter than it does from PoE at 48 V. Transition from adapter power to PoE may demand more current than can be supplied by the PSE. The converter must be turned off while CIN capacitance charges, with a subsequent converter restart at the higher voltage and lower input current. A third example is use of a 12-V adapter with ORing option 1. The PD hotswap would have to handle four times the current, and have 1/16 the resistance (be 16 times larger) to dissipate equal power. A fourth example is that MPS is lost when running from the adapter, causing the PSE to remove power from the PD. If adapter power is then lost, the PD stops operating until the PSE detects and powers the PD.

The most popular preferential ORing scheme is option 2 with adapter priority. The hotswap MOSFET is disabled when the adapter is used to pull APD high, blocking the PoE source from powering the output. This solution works well with a wide range of adapter voltages, is simple, and requires few external parts. When the AC power fails, or the adapter is removed, the hotswap switch is enabled. In the simplest implementation, the PD momentarily loses power until the PSE completes its start-up cycle.

The DEN pin can be used to disable the PoE input when ORing with option 3. This is an adapter priority implementation. Pulling DEN low, while creating an invalid detection signature, disables the hotswap MOSFET, and prevents the PD from redetecting. This would typically be accomplished with an optocoupler that is driven from the secondary side of the converter.

The least popular technique is PoE priority. It is implemented by placing a diode between the PD supply voltage, VDD, and the DC-DC controller bias voltage, VDD1. The diode prevents reverse biasing of the PoE input diode bridges when option 2 adapter ORing is used. The PSE may then detect, classify, and provide power to the PD while a live adapter is connected. As long as the PoE voltage is greater than the adapter voltage, the PSE powers the load. The APD function is not used in this technique.

The IEEE standards require that the PI conductors be electrically isolated from ground and all other system potentials not part of the PI interface. The adapter must meet a minimum 1500-Vac dielectric withstand test between the output and all other connections for options 1 and 2. The adapter only needs this isolation for option 3 if it is not provided by the converter.

Adapter ORing diodes are shown for all the options to protect against a reverse-voltage adapter, a short on the adapter input pins, and damage to a low-voltage adapter. ORing is sometimes accomplished with a MOSFET in option 3.