SLVSCV6A January   2015  – February 2015 TPS24740 , TPS24741 , TPS24742

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematics
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Internal Power ORing of TPS24740
      2. 9.3.2  Enable and Over-voltage Protection
      3. 9.3.3  Current Limit and Power Limit During Start-up
      4. 9.3.4  Two Level Protection During Regular Operation
      5. 9.3.5  Dual Timer (TFLT and TINR)
      6. 9.3.6  Using SoftStart - IHGATE and TINR Considerations
      7. 9.3.7  Three Options for Response to a Fast Trip
      8. 9.3.8  Programmable Reverse Voltage Threshold
      9. 9.3.9  Analog Current Monitor
      10. 9.3.10 Power Good Flag
      11. 9.3.11 ORing MOSFET Status Indicator
      12. 9.3.12 Fault Reporting
    4. 9.4 Device Functional Modes
      1. 9.4.1 ORing Functional Modes
      2. 9.4.2 Hot Swap Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 30A Single channel OR then Hot Swap With Current Monitoring
      2. 10.2.2 Design Requirements
      3. 10.2.3 Detailed Design Procedure
        1. 10.2.3.1  Select RSNS and VSNS,CL Setting
        2. 10.2.3.2  Selecting the Fast Trip Threshold and Filtering
        3. 10.2.3.3  Selecting the Hot Swap FET(s)
        4. 10.2.3.4  Select Power Limit
        5. 10.2.3.5  Set Fault Timer
        6. 10.2.3.6  Check MOSFET SOA
        7. 10.2.3.7  Choose ORing MOSFET
        8. 10.2.3.8  Choose Reverse Current Threshold and Filtering
        9. 10.2.3.9  Choose Under Voltage and Over Voltage Settings
        10. 10.2.3.10 Selecting CIN, COUT, and CMIDDLE
        11. 10.2.3.11 Selecting D1 and D2
        12. 10.2.3.12 Ensuring Stability
        13. 10.2.3.13 Compute Tolerances
      4. 10.2.4 Application Curves
      5. 10.2.5 40 A Single Channel Hot Swap then ORing
        1. 10.2.5.1 Design Requirements
        2. 10.2.5.2 Design Procedure
          1. 10.2.5.2.1  Select RSNS and VSNS,CL Setting
          2. 10.2.5.2.2  Selecting the Fast Trip Threshold and Filtering
          3. 10.2.5.2.3  Selecting the Hot Swap FET
          4. 10.2.5.2.4  Select Power Limit
          5. 10.2.5.2.5  Set Fault Timer
          6. 10.2.5.2.6  Check MOSFET SOA
          7. 10.2.5.2.7  Checking Stability of Hot Swap Loop
          8. 10.2.5.2.8  Choose ORing MOSFET
          9. 10.2.5.2.9  Choose Reverse Current Threshold and Filtering
          10. 10.2.5.2.10 Choose Under Voltage and Over Voltage Settings
          11. 10.2.5.2.11 Selecting CIN, COUT, CMIDDLE, and Transient Protection
          12. 10.2.5.2.12 Adding CENHS
        3. 10.2.5.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 TPS2474x in Battery Back Up
      2. 10.3.2 TPS2474x in Priority Muxing
      3. 10.3.3 TPS2474x with Multiple Loads and Multiple Supplies
      4. 10.3.4 Two Supplies Powering a Load
      5. 10.3.5 TPS2474x in Redundant DC/DC Applications
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Device Comparison Table

PART NUMBER(1) LATCH / RETRY OPTION
TPS24740 Latch
TPS24741 Auto – Retry
TPS24742 Fast Latch Off
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com.