SLVSHR9 December   2024 TPS25984B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Digital Overcurrent Indication (D_OC)
      8. 7.3.8  Stacking Multiple eFuses for Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (GOK/FLT)
      12. 7.3.12 Power-Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
      3. 8.1.3 Digital Telemetry Using External Microcontroller
    2. 8.2 Typical Application: 12V, 3.3kW Power Path Protection in Data Center Servers
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

TPS25984B TPS25984Bx RZJ Package, 32-pin QFN (Top View)Figure 5-1 TPS25984Bx RZJ Package, 32-pin QFN (Top View)
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.

OUT

1, 2, 25, 26, 27, 28, 29, 30, 31, 32OPower output. Must be soldered to output power plane uniformly to ensure proper heat dissipation and to maintain optimal current distribution through the device.

D_OC

3

OOpen-drain signal to indicate overcurrent event.

EN/UVLO

4

I

Active high enable input. Connect resistor divider from input supply to set the undervoltage threshold. Do not leave floating.

GOK/FLT

5

I/O

Open-drain active low fault indication. Also acts as an input for synchronizing faults between parallel devices. Do not leave floating.

PG

6

O

Open-drain active high Power Good indication. This pin is recommended to be pulled up externally to a logic level supply.

NC

7

N/A

No connect. Can be left floating or connected to input supply.

MODE

8

I

TPS25984B2: Retry mode selection pin.

DNC

TPS25984B0/1/3: Do not connect anything to this pin.

IN

9, 10, 11, 12, 13, 14, 15, 16, Exposed Pad

P

Power input. Must be soldered to input power plane uniformly to ensure proper heat dissipation and to maintain optimal current distribution through the device.

DNC

17

I/O

Internal test mode pin. Do not force a voltage on this pin externally.

TEMP

18

O

Die junction temperature monitor analog voltage output. Can be tied together with TEMP outputs of multiple devices in a parallel configuration to indicate the peak temperature of the chain.

DVDT

19

O

Start-up output slew rate control pin. Leave this pin open to allow fastest start-up. Connect capacitor to ground to slow down the slew rate to manage inrush current.

GND

20

G

Device ground reference pin. Connect to system ground.

VREG

21

O

Internal LDO output. Decouple with a capacitor to GND.

IMON

22

O

An external resistor from this pin to GND sets the voltage gain for the analog output load current monitor signal during steady-state.

ILIM

23

O

An external resistor from this pin to GND sets the current limit threshold during start-up as well as circuit-breaker and fast-trip threshold during steady-state. This pin also acts as analog load current monitor during start-up and steady-state. Do not leave floating.

IREF

24

I/O

Reference voltage for overcurrent and short-circuit protection blocks. Can be generated using internal current source and resistor on this pin, or can be driven from external voltage source. Do not leave floating.