SLVSHR9 December   2024 TPS25984B

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Digital Overcurrent Indication (D_OC)
      8. 7.3.8  Stacking Multiple eFuses for Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (GOK/FLT)
      12. 7.3.12 Power-Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
      3. 8.1.3 Digital Telemetry Using External Microcontroller
    2. 8.2 Typical Application: 12V, 3.3kW Power Path Protection in Data Center Servers
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

The TPS25984Bx is an integrated hotswap protection (eFuse) device that is used to manage load voltage and load current. The device starts its operation by monitoring IN bus. When VIN exceeds the Undervoltage Protection (UVP) threshold, the device waits for the insertion delay timer duration to allow the supply to stabilize before starting up. Next the device samples the EN/UVLO pin. A high level on this pin enables the internal MOSFET to start conducting and allow current to flow from IN to OUT. When EN/UVLO is held low, the internal MOSFET is turned off.

After a successful start-up sequence, the TPS25984Bx device now actively monitors its load current and input voltage, and controls the internal FET to ensure that the programmed overcurrent threshold is not exceeded and input overvoltage spikes are cut off. This action keeps the system safe from harmful levels of voltage and current. At the same time, a fixed internal overcurrent blanking timer allows the system to pass transient peaks in the load current profile without tripping the eFuse. Similarly, voltage transients on the supply line are intelligently masked to prevent nuisance trips. This feature ensures a robust protection solution against real faults which is also immune to transients, thereby ensuring maximum system uptime.

The device has integrated high accuracy and high bandwidth analog load current monitor, which allows the system to precisely monitor the load current in steady state as well as during transients. This feature facilitates the implementation of advanced dynamic platform power management techniques such as Intel® PSYS to maximize system power usage and throughput without sacrificing safety and reliability.

For systems needing higher load current support, multiple TPS25984Bx eFuses can be connected in parallel. All devices share current during start-up to avoid over-stressing some of the devices more than others which can result in premature or partial shutdown of the parallel chain.

The device has integrated protection circuits to ensure device safety and reliability under recommended operating conditions. The internal FET SOA is protected at all times using the thermal shutdown mechanism, which turns off the FET whenever the junction temperature (TJ) becomes too high for the FET to operate safely.