SLVSHR9 December   2024 TPS25984B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Digital Overcurrent Indication (D_OC)
      8. 7.3.8  Stacking Multiple eFuses for Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (GOK/FLT)
      12. 7.3.12 Power-Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
      3. 8.1.3 Digital Telemetry Using External Microcontroller
    2. 8.2 Typical Application: 12V, 3.3kW Power Path Protection in Data Center Servers
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

(Test conditions unless otherwise noted) –40°C ≤ TJ ≤ 125°C, VIN = 12V, OUT = Open, VEN/UVLO = 2V, D_OC = 10kΩ pull-up to 5V, RILIM = 1.1kΩ, RIMON = 1.1kΩ, VIREF = 1V, DVDT = Open, GOK/FLT = 10kΩ pull-up to 5V, PG = 10kΩ pull-up to 5V, TEMP = Open, MODE = Open. All voltages referenced to GND. 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY (IN)
VIN VIN input operating voltage range 4.5 16 V
VUVPIN(R) VIN undervoltage protection threshold VIN Rising 4 4.25 4.5 V
VUVPIN(F) VIN undervoltage protection threshold VIN Falling 3.9 4.15 4.4 V
IQON(IN) IN ON state quiescent current VEN ≥ VUVLO(R) 3500 4420 µA
IQOFF(IN) IN OFF state current   VEN < VUVLO(F) 110 165 µA
ENABLE / UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R) EN/UVLO pin voltage rising threshold for turning on EN/UVLO  Rising 1.35 1.40 1.52 V
VUVLO(F) EN/UVLO pin voltage falling threshold for turning off and engaging output discharge (primary device) EN/UVLO Falling, MODE = Open 1.16 1.20 1.23 V
EN/UVLO pin voltage threshold for turning off and engaging QOD (secondary device) EN/UVLO Falling, MODE = GND 0.2 V
VSD(F) EN/UVLO pin voltage threshold for entering full shutdown EN/UVLO Falling 0.5 0.8 V
IENLKG EN/UVLO pin leakage current –0.1 0.1
µA
OVERVOLTAGE PROTECTION (IN)
VOVP(R) Input overvoltage protection threshold (rising) VIN rising 17.78 18.4 18.74 V
VOVP(F) Input overvoltage protection threshold (falling) VIN falling 17.17 17.7 18 V
ON-RESISTANCE (IN - OUT)
RON ON resistance IOUT = 8A, TJ = 25℃ 0.80 0.95 mΩ
IOUT = 8A, TJ = –40 to 125℃ 1.5 mΩ
OVERCURRENT PROTECTION REFERENCE (IREF)
VIREF IREF pin recommended voltage range 0.3 1.8 V
IIREF IREF pin internal sourcing current 9.73 10 10.26
µA
CIRCUIT-BREAKER AND CURRENT LIMIT (ILIM)
GILIM(LIN) ILIM current monitor gain (ILIM:IOUT) Device in Steady State (PG asserted) 7.28 7.5 7.76 µA/A
CLREF(LIN)% Ratio of steady-state overcurrent protection threshold (IOCP) to Overcurrent protection reference voltage (VIREF) VOUT > VFB, PG asserted 75 %
CLREF(SAT)% Ratio of start-up current limit threshold (ILIM) to steady-state overcurrent protection threshold (IOCP) VOUT > VFB, PG not asserted 53.3 %
DOCREF% Ratio of  steady state IOUT to at which overcurrent warning (D_OC) gets asserted to steady-state overcurrent protection threshold reference (IOCP) PG asserted 85 %
ILIM Start-up current limit regulation threshold  RILIM = 1.1kΩ, VIREF = 0.835V, VOUT > VFB 28 39.47 52 A
RILIM = 1.1kΩ, VIREF = 0.714V, VOUT > VFB 25 34.62 45 A
RILIM = 1.1kΩ, VIREF = 0.3V, VOUT > VFB 10.5 14 17.5 A
VFB Foldback voltage 1.98 V
OUTPUT CURRENT MONITOR (IMON)
GIMON IMON current monitor gain (IMON:IOUT) Device in steady state (PG asserted) 9.78 10 10.25 µA/A
IOCP Steady-state overcurrent protection (Circuit-Breaker) threshold RILIM = 2kΩ, VIREF = 1.4V 65.8 70 74.2 A
RILIM = 2kΩ, VIREF = 1V 47.11 50.10 52.85 A
RILIM = 2kΩ, VIREF = 0.5V 24.18 25.08 25.95 A
RILIM = 2kΩ, VIREF = 0.24V 11.6 12.03 12.5 A
SHORT-CIRCUIT PROTECTION
IFFT Fixed fast-trip threshold in steady-state PG asserted High 148 A
SFTREF(LIN)% Scalable fast-trip threshold (ILIM) to overcurrent protection threshold reference (IOCP) ratio during steady-state PG asserted High 200 %
SFTREF(SAT)% Scalable fast-trip threshold (ILIM) to overcurrent protection threshold reference (IOCP) ratio during start-up PG de-asserted Low 80 %
INTERNAL LDO OUTPUT (VREG)
VREG VREG pin internal LDO voltage IREG = 0mA 2.8 3.15 3.6 V
VREG VREG pin Internal LDO voltage Resistor = 1k from VREG  to GND 2.2 2.58 3 V
INRUSH CURRENT PROTECTION (DVDT)
IDVDT DVDT pin charging current TPS25984B0/1/3 variants 1.85 2.5 3.22
µA
TPS25984B2 variant 5.5 6.6 7.5
µA
GDVDT DVDT gain 20 V/V
RDVDT DVDT pin to GND discharge resistance 526 Ω
RON(GHI) RON when PG is asserted 0.5 0.92 1.6 mΩ
QUICK OUTPUT DISCHARGE (OUT)
IQOD Quick output discharge internal pull-down current VSD(F) < VEN < VUVLO(F), –40 < TJ < 125℃ 21.43 mA
TEMPERATURE SENSOR OUTPUT (TEMP)
GTMP TEMP sensor gain 2.58 2.65 2.72 mV/℃
VTMP TEMP pin output voltage TJ = 25℃ 676 679 684 mV
ITMPSRC TEMP pin sourcing current 91.9 µA
ITMPSNK TEMP pin sinking current 10 µA
OVERTEMPERATURE PROTECTION
TSD Thermal shutdown threshold TJ Rising 150 °C
TSDHYS Thermal shutdown hysteresis TJ Falling 12.5 °C