SLVSDT4F October 2017 – December 2021 TPS2662
PRODUCTION DATA
The device monitors V(IN) and V(OUT) to provide true reverse current blocking when a reverse condition or input power failure condition is detected. The reverse comparator turns OFF the internal FET within 310 ns (typical) as soon as V(IN) – V(OUT) falls below –2.6 V. The reverse comparator turns on within 63 µs (typical) after the differential forward voltage V(IN)– V(OUT) exceeds 115 mV. Figure 9-13 and Figure 9-14 illustrate the behavior of the system during input hot short circuit condition.
The reverse comparator architecture has a supply line noise immunity resulting in a robust performance in noisy environments. This feature is achieved by controlling the turn OFF time of the internal FET based on the over-drive differential voltage V(IN) – V(OUT) over V(REVTH). Higher the over-drive, faster the turn OFF time, tREV(dly). Figure 7-22 shows the reverse current blocking response time versus over-drive voltage.