SLVSDT4F October 2017 – December 2021 TPS2662
PRODUCTION DATA
When the load draws current during the turn-on sequence, additional power is dissipated in the device. Considering a resistive load RL(SU) during start-up, typical ramp-up of output voltage, Figure 10-4 shows load current and the instantaneous power dissipation in the device. Figure 10-5 plots Instantaneous power dissipation with respect to time.
VIN = 24 V | RL(SU) = 96 Ω | ||
CdVdT = 10 nF | COUT = 22 µF |
VIN = 24 V | RL(SU) = 96 Ω | ||
CdVdT = 10 nF | COUT = 22 µF |
The additional power dissipation during start-up is calculated using Equation 10.
Total power dissipated in the device during start-up is given by Equation 11.
Total current during start-up is given by Equation 12.
For the design example under discussion,
Select the inrush current I(INRUSH) = 0.1 A and tdVdT calculated using Equation 8 is 5.28 ms.
For a given start-up time, CdVdT capacitance value calculated using Equation 2 is 10.7 nF for tdVdT = 5.28 ms and VIN = 24 V.
Choose the closest standard value: 10.0 nF and 16-V capacitor.
The inrush power dissipation due to output capacitor alone is calculated using Equation 9 and it is 1.2 W. Considering the start-up with 96-Ω load, the additional power dissipation calculated using Equation 10 is 1 W. The total device power dissipation during start-up is 2.2 W
The power dissipation with or without load, for a selected start-up time must not exceed the thermal shutdown limits as shown in Figure 10-6.
From the thermal shutdown limit graph, at TA = 125°C, thermal shutdown time for 2.2 W is close to 580 ms. It is safe to have a minimum 30% margin to allow for variation of the system parameters such as load, component tolerance, input voltage and layout. Selected 10-nF CdVdT capacitor and 5.28-ms start-up time (tdVdT) are well within the limit for successful start-up with 96-Ω load.
Higher value C(dVdT) capacitor can be selected to further reduce the power dissipation during start-up.