SLVSH67 September 2024 TPS26750
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Fan these traces out from the TPS26750, use vias to connect the net to a routing layer if needed. For these nets, use 4mil to 10mil trace width.
I2Cc_SDA/SCL/IRQ (pins 8, 9, and 10) and I2Ct_SCL/SDA/IRQ (pins 15, 16, and 17)
Minimize trace width changes to avoid I2C communication issues.
ADCIN1 and ADCIN2 (pins 2 and 3)
Keep the ADCINx traces away from switching elements. If a resistor divider is used, place the divider close to LDO_3V3 or LDO_1V5.
GPIO (pins 5, 6, 7, 18, 22, 23, 31, 30, and 13)
Separate GPIO traces running in parallel by a trace width. Keep the GPIOx traces away from switching elements.