SLVSGD3B December   2022  – August 2024 TPS281C30

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 Working Mode
    4. 8.4 Feature Description
      1. 8.4.1 Accurate Current Sense
        1. 8.4.1.1 High Accuracy Sense Mode
      2. 8.4.2 Programmable Current Limit
        1. 8.4.2.1 Short-Circuit and Overload Protection
        2. 8.4.2.2 Capacitive Charging
      3. 8.4.3 Inductive-Load Switching-Off Clamp
      4. 8.4.4 Inductive Load Demagnetization
      5. 8.4.5 Full Protections and Diagnostics
        1. 8.4.5.1 Open-Load Detection
        2. 8.4.5.2 Thermal Protection Behavior
        3. 8.4.5.3 Undervoltage Lockout (UVLO) Protection
        4. 8.4.5.4 Overvoltage (OVP) Protection
        5. 8.4.5.5 Reverse Polarity Protection
        6. 8.4.5.6 Protection for MCU I/Os
        7. 8.4.5.7 Diagnostic Enable Function
        8. 8.4.5.8 Loss of Ground
        9. 8.4.5.9 Enhanced EFT Immunity
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 IEC 61000-4-5 Surge
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting RILIM
        2. 9.2.2.2 Selecting RSNS
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 EMC Considerations
      2. 9.4.2 Layout Example
        1. 9.4.2.1 PWP Layout without a GND Network
        2. 9.4.2.2 PWP Layout with a GND Network
        3. 9.4.2.3 RGW Layout with a GND Network
      3. 9.4.3 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.2 Programmable Current Limit

A high-accuracy current limit allows higher reliability, which protects the power supply during short circuit or power up. Also, it can save system costs by reducing PCB traces, connector size, and the capacity of the preceding power stage.

Current limit offers protection from overstressing to the load and integrated power FET. Current limit holds the current at the set value, and pulls up the SNS pin to VSNSFH and asserts the FAULT pin as diagnostic reports. The two current-limit thresholds are:

  • External programmable current limit -- An external resistor, RILIMis used to set the channel current limit. When the current through the device exceeds ICL (current limit threshold), a closed loop steps in immediately. VGS voltage regulates accordingly, leading to the VDS voltage regulation. When the closed loop is set up, the current is clamped at the set value. The external programmable current limit provides the capability to set the current-limit value by application.

    Additionally this value can be dynamically changed by changing the resistance on the ILIM pin. This can be seen in the Applications Section

  • Internal current limit: ILIM pin open or pin shorted to ground -- If the external current limit is out of range on the lower end or the ILIM pin is shorted to ground, the internal current limit is fixed and typically 0.5A. This works as a safety power limitting mechanicsm during failures with shorts or open connections with PCB

    Overstress.

Both the internal current limit (Ilim,nom) and external programmable current limit are always active when VS is powered and EN is high. The lower value one (of ILIM and the external programmable current limit) is applied as the actual current limit. The typical deglitch time for the current limit to assert is 2.5µs.

Note that if a GND network is used (which leads to the level shift between the device GND and board GND), the ILIM pin must be connected with device GND. Calculate RLIM with Equation 2.

Equation 2. RILIM = KCL / ICL

For better protection from a hard short-to-GND condition (when VS and input are high and a short to GND happens suddenly), an open-loop fast-response behavior is set to turn off the channel, before the current-limit closed loop is set up. With this fast response, the device can achieve better inrush-suppression performance.